Pin Configurations Pin Tqfp Pinout | Cypress CY7C1371D, CY7C1373D

CY7C1371D

CY7C1373D

Pin Configurations

100-Pin TQFP Pinout

BYTE C

BYTE D

DQPC

DQC

VDDQ

VSS

DQC DQC DQC DQC

VSS VDDQ

DQC DQC

VDD

VSS

DQD

VDDQ

VSS

DQD DQD DQD DQD

VSS VDDQ

DQD DQD

DQPD

A		A		CE	CE		BW	BW	BW	BW		CE	V		V		CLK		WE	CEN	OE		ADV/LD		A		A		A	A
A		A		CE	CE		BW	BW	BW	BW		CE	V		V		CLK		WE	CEN	OE		ADV/LD		A		A		A	A
				1	2		D	C	B	A	3			DD		SS
														DD		SS



100		99		98	97		96	95	94	93	92		91		90		89		88	87	86	85			84		83		82	81
1																														80
2																														79
3																														78
4																														77
5																														76
6																														75
7																														74
8																														73
9																														72
10																														71
11																														70
12																														69
13											CY7C1371D																			68
14											CY7C1371D																			67
14																														67
15																														66
16																														65
17																														64
18																														63
19																														62
20																														61
21																														60
22																														59
23																														58
24																														57
25																														56
26																														55
27																														54
28																														53
29																														52
30																														51
31		32		33	34		35	36	37	38	39		40		41		42		43	44	45	46			47		48		49	50


	MODE		A	A		A	A	A1	A0	NC/288M		NC/144M		SS		DD		NC/72M	NC/36M	A	A			A		A		A	A		A
	MODE		A	A		A	A	A1	A0	NC/288M		NC/144M		V		V		NC/72M	NC/36M	A	A			A		A		A	A		A

DQPB

DQB DQB

VDDQ

VSS

DQB DQB DQB DQB

VSS

VDDQ

DQB DQB

VSS

VDD

DQA DQA

VDDQ

VSS

DQA DQA DQA DQA

VSS

VDDQ

DQA DQA DQPA

BYTE B

BYTE A

Document #: 38-05556 Rev. *F

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Cypress CY7C1371D, CY7C1373D manual Pin Configurations Pin Tqfp Pinout

Contents

Cypress Semiconductor Corporation FeaturesSelection Guide Functional Description1 133 MHz 100 MHz Unit Logic Block Diagram CY7C1373D 1M x Logic Block Diagram CY7C1371D 512K x CY7C1371D Pin Configurations Pin Tqfp Pinout CY7C1373D Pin Configurations CE2 Pin Configurations Ball Fbga Pinout Pin Definitions Functional Overview Single Read AccessesBurst Read Accesses Single Write Accesses Interleaved Burst Address Table Mode = Floating or VDD Linear Burst Address Table Mode = GNDZZ Mode Electrical Characteristics Function CY7C1373D Partial Truth Table for Read/Write 2, 3Address Operation Used Function CY7C1371D Ieee 1149.1 Serial Boundary Scan Jtag TAP Controller State Diagram TAP Controller Block Diagram TAP Instruction Set Bypass Register Extest Output Bus Tri-State TAP Timing Output Times TAP AC Switching Characteristics Over the Operating Range10Setup Times Parameter Description Min Max Unit Clock TAP DC Electrical Characteristics And Operating Conditions 3V TAP AC Test ConditionsParameter Description Conditions Min Max Unit Register Name Bit Size Identification Register DefinitionsScan Register Sizes Identification Codes Bit # Ball ID Ball BGA Boundary Scan Order 13 A10 B10 P10 Ambient Range Electrical CharacteristicsMaximum Ratings Operating Range Capacitance18 Thermal Resistance18AC Test Loads and Waveforms 133 MHz 100 MHz Parameter Description Unit Min Max Switching Characteristics Over the Operating Range23 Read Switching WaveformsRead/Write Waveforms25, 26 Rite Stall NOP NOP, Stall and Deselect Cycles25, 26Address Stall DON’T Care ZZ Mode Timing29 Ordering Information Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm Package Diagrams Ball BGA 14 x 22 x 2.4 mm Ball Fbga 13 x 15 x 1.4 mm Document History Issue Orig. Description of Change Date