CY7C1471V33
CY7C1473V33
CY7C1475V33
Capacitance
Tested initially and after any design or process change that may affect these parameters.
Parameter | Description | Test Conditions | 100 TQFP | 165 FBGA | 209 BGA | Unit | |
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CADDRESS | Address Input Capacitance | TA = 25°C, f = 1 MHz, | 6 | 6 | 6 | pF | |
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| VDD = 3.3V |
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CDATA | Data Input Capacitance | 5 | 5 | 5 | pF | ||
VDDQ = 2.5V | |||||||
CCTRL | Control Input Capacitance | 8 | 8 | 8 | pF | ||
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CCLK | Clock Input Capacitance |
| 6 | 6 | 6 | pF | |
CIO | Input/Output Capacitance |
| 5 | 5 | 5 | pF |
Thermal Resistance
Tested initially and after any design or process change that may affect these parameters.
Parameter | Description | Test Conditions | 100 TQFP | 165 FBGA | 209 FBGA | Unit | |
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ΘJA | Thermal Resistance | Test conditions follow | 24.63 | 16.3 | 15.2 | °C/W | |
| (Junction to Ambient) | standard test methods |
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ΘJC | Thermal Resistance | 2.28 | 2.1 | 1.7 | °C/W | ||
measuring thermal | |||||||
| (Junction to Case) | impedance, according to |
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AC Test Loads and Waveforms
3.3V IO Test Load
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| 3.3V |
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| R = 317Ω |
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| ALL INPUT PULSES | ||||||||||||||||||||
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| VDDQ |
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| Z0 | = 50Ω |
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| OUTPUT |
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| RL | = 50Ω |
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| 10% |
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| 90% |
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| 5 pF |
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| R = 351Ω | GND |
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| ≤ 1 ns |
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| VL = 1.5V |
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2.5V IO Test Load |
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OUTPUT |
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| 2.5V |
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| R = 1667Ω |
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| VDDQ |
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| Z0 | = 50Ω |
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| OUTPUT |
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| RL | = 50Ω |
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| 10% |
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| 5 pF |
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| R = 1538Ω | GND |
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| VL = 1.25V |
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| INCLUDING |
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| SCOPE |
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90%
10%
≤ 1 ns
90%
10%
≤ 1 ns
Document #: | Page 22 of 32 |
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