Cypress CY7C1486V25, CY7C1480V25, CY7C1482V25 manual Read/Write Cycle Timing21, 23

Models: CY7C1486V25 CY7C1482V25 CY7C1480V25

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CY7C1480V25

CY7C1482V25

CY7C1486V25

Switching Waveforms (continued)

Read/Write Cycle Timing[21, 23, 24]

tCYC

CLK

tCH tCL

tADS tADH

ADSP

ADSC

tAS tAH

ADDRESS

A1

A2

BWE, BWX

tCES tCEH

CE

ADV

OE

 

 

 

tCO

Data In (D)

High-Z

t

tOEHZ

 

 

 

 

CLZ

 

Data Out (Q)

High-Z

Q(A1)

Q(A2)

 

 

Back-to-Back

READs

A3A4

tWES tWEH

tDS tDH

 

tOELZ

 

 

 

D(A3)

 

 

 

 

 

Q(A4)

Q(A4+1)

Q(A4+2)

Q(A4+3)

Single WRITE

 

BURST READ

 

 

DON’T CARE

UNDEFINED

 

 

 

A5A6

D(A5) D(A6)

Back-to-Back

WRITEs

Notes

23.The data bus (Q) remains in high-Z following a write cycle, unless a new read access is initiated by ADSP or ADSC.

24.GW is HIGH.

Document #: 38-05282 Rev. *H

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Cypress CY7C1486V25, CY7C1480V25, CY7C1482V25 manual Read/Write Cycle Timing21, 23