Configurations
Features
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Functional Description
Logic Block Diagram CY7C1527KV18
Logic Block Diagram CY7C1516KV18
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
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Logic Block Diagram CY7C1520KV18
Logic Block Diagram CY7C1518KV18
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
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CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Pin Configuration
165-Ball FBGA 13 x 15 x 1.4 mm Pinout
165-Ball FBGA 13 x 15 x 1.4 mm Pinout
Pin Configuration continued
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Pin Definitions
CY7C1518KV18, CY7C1520KV18
CY7C1516KV18, CY7C1527KV18
CY7C1516KV18, CY7C1527KV18
CY7C1518KV18, CY7C1520KV18
Pin Definitions continued
Functional Overview
Single Clock Mode
Read Operations
Write Operations
Programmable Impedance
Application Example
Echo Clocks
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Truth Table
Write Cycle Descriptions
Burst Address Table
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Write Cycle Descriptions
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Write Cycle Descriptions
Test Access Port-Test Clock
Disabling the JTAG Feature
Test Mode Select TMS
Performing a TAP Reset
SAMPLE Z
IDCODE
SAMPLE/PRELOAD
BYPASS
Page 14 of
TAP Controller State Diagram
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
TAP Controller Block Diagram
TAP Electrical Characteristics
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
TAP AC Switching Characteristics
TAP Timing and Test Conditions
Scan Register Sizes
Identification Register Definitions
Instruction Codes
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Boundary Scan Order
Power Up Sequence
Power Up Sequence in DDR-II SRAM
PLL Constraints
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
DC Electrical Characteristics
Electrical Characteristics
Maximum Ratings
Operating Range
AC Electrical Characteristics
Electrical Characteristics continued
DC Electrical Characteristics
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Thermal Resistance
Capacitance
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Package
Parameter
Switching Characteristics
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Switching Characteristics continued
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Switching Waveforms
READ
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CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Ordering Information
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Diagram
Ordering Information continued
Speed
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Diagram
Ordering Information continued
Speed
CY7C1516KV18, CY7C1527KV18 CY7C1518KV18, CY7C1520KV18
Package Diagram
Figure 6. 165-Ball FBGA 13 x 15 x 1.4 mm
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