CY7C1392CV18, CY7C1992CV18
CY7C1393CV18, CY7C1394CV18
Document History Page
Document Title: CY7C1392CV18/CY7C1992CV18/CY7C1393CV18/CY7C1394CV18,
Burst Architecture
Document Number:
Rev. | ECN No. | Submission | Orig. of | Description of Change |
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| Date | Change |
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** | 433284 | See ECN | NXR | New data sheet |
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*A | 462615 | See ECN | NXR | Changed tCYC from 100 ns to 50 ns, changed tTH and tTL from 40 ns to 20 ns, changed |
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| tTMSS, tTDIS, tCS, tTMSH, tTDIH, tCH from 10 ns to 5 ns and changed tTDOV from 20 ns |
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| to 10 ns in TAP AC Switching Characteristics table |
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| Modified |
*B | 1523386 | See ECN | VKN/AESA | Converted from preliminary to final, Updated Logic Block diagram, Updated IDD/ISB |
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| specs, Changed DLL minimum operating frequency from 80MHz to 120MHz, Changed |
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| tCYC max spec to 8.4ns for all speed bins, Modified footnotes 20 and 28. |
*C | 2507766 | 05/23/08 | VKN/PYRS | Changed Ambient Temperature with Power Applied from |
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| to +125°C” in the “Maximum Ratings“ on page 20, Updated power up sequence |
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| waveform and its description, Added footnote #19 related to IDD, Changed ΘJA spec |
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| from 28.51 to 18.7, Changed ΘJC spec from 5.91 to 4.5, Changed JTAG ID [31:29] |
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| from 001 to 000. |
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Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in
Use may be limited by and subject to the applicable Cypress software license agreement.
Document #: | Revised May 22, 2008 | Page 30 of 30 |
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