Cypress CY8C21234, CY8C21334, CY8C21434, CY8C21534 manual Smp, CY8C21634 part

CY8C21634, CY8C21534

CY8C21434, CY8C21334, CY8C21234

Table 6. Pin Definitions - CY8C21434/CY8C21634 32-Pin (QFN)[4]

Pin		Type		Name	Description
No.	Digital		Analog
1	IO		I, M	P0[1]	Analog column mux input, integrating input.
2	IO		M	P2[7]
3	IO		M	P2[5]
4	IO		M	P2[3]
5	IO		M	P2[1]
6	IO		M	P3[3]	In CY8C21434 part.
6	Power			SMP	Switch Mode Pump (SMP) connection to required external components in
					CY8C21634 part.
7	IO		M	P3[1]	In CY8C21434 part.
7	Power			Vss	Ground connection in CY8C21634 part.
8	IO		M	P1[7]	I2C Serial Clock (SCL).
9	IO		M	P1[5]	I2C Serial Data (SDA).
10	IO		M	P1[3]
11	IO		M	P1[1]	I2C Serial Clock (SCL), ISSP-SCLK[3].
12	Power			Vss	Ground connection.
13	IO		M	P1[0]	I2C Serial Data (SDA), ISSP-SDATA[3]
14	IO		M	P1[2]
15	IO		M	P1[4]	Optional External Clock Input (EXTCLK).
16	IO		M	P1[6]
17	Input			XRES	Active high external reset with internal pull down.
18	IO		M	P3[0]
19	IO		M	P3[2]
20	IO		M	P2[0]
21	IO		M	P2[2]
22	IO		M	P2[4]
23	IO		M	P2[6]
24	IO		I, M	P0[0]	Analog column mux input.
25	IO		I, M	P0[2]	Analog column mux input.
26	IO		I, M	P0[4]	Analog column mux input.
27	IO		I, M	P0[6]	Analog column mux input.
28	Power			Vdd	Supply voltage.
29	IO		I, M	P0[7]	Analog column mux input.
30	IO		I, M	P0[5]	Analog column mux input.
31	IO		I, M	P0[3]	Analog column mux input, integrating input.
32	Power			Vss	Ground connection.

LEGEND A = Analog, I = Input, O = Output, and M = Analog Mux Input.

Note

4.The center pad on the QFN package must be connected to ground (Vss) for best mechanical, thermal, and electrical performance. If not connected to ground, it must be electrically floated and not connected to any other signal.

Document Number: 38-12025 Rev. *O Page 12 of 45

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