CY8C21634, CY8C21534CY8C21434, CY8C21334, CY8C21234
Document Number: 38-12025 Rev. *O Page 8 of 45
Pin Information
The CY8C21x34 PSoC device is available in a variety of packages which are listed in the following tables. Every port pin (labeled with
a “P”) is capable of Digital IO and connection to the common analog bus. However, Vss, Vdd, SMP, and XRES are not capable of
Digital IO.
16-Pin Part Pinout
Figure 3. CY8C21234 16-Pin PSoC Device
Note
3. These are the ISSP pins, which are not High Z at POR (Power On Reset). See the PSoC Programmable System-on-Chip Technical Reference Manual for details.
SOIC
Vdd
P0[6], A, I, M
P0[4], A, I, M
P0[2], A, I, M
P0[0], A, I, M
P1[4], EXTCLK, M
P1[2], M
P1[0], I2C SDA, M
16
15
14
13
12
11
1
2
3
4
5
6
7
8
A, I, M, P0[7]
A, I, M, P0[5]
A, I, M, P0[3]
A, I, M, P0[1]
SMP
Vss
M, I2C SCL , P1[1]
Vss
10
9
Table 3. Pin Definitions - CY8C21234 16-Pin (SOIC)
Pin No. Type Name Description
Digital Analog
1IO I, M P0[7] Analog column mux i nput.
2IO I, M P0[5] Analog column mux input.
3IO I, M P0[3] Analog column mux input, integrating input.
4IO I, M P0[1] Analog column mux input, i ntegrating input.
5Power SMP Switch Mode Pump (SMP) connection to required external components.
6Power Vss Ground connection.
7IO MP1[1] I2C Serial Clock (SCL), ISSP-SCLK[3].
8Power Vss Ground connection.
9IO MP1[0] I2C Serial Data (SDA), ISSP-SDATA[3]..
10 IO MP1[2]
11 IO MP1[4] Optional External Clock Input (EXTCLK).
12 IO I, M P0[0] Analog column mux i nput.
13 IO I, M P0[2] Analog column mux i nput.
14 IO I, M P0[4] Analog column mux i nput.
15 IO I, M P0[6] Analog column mux i nput.
16 Power Vdd Supply voltage.
LEGEND A = Analog, I = Input, O = Output, and M = Analog Mux Input.
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