Cypress CY8C21634, CY8C21534

CY8C21634, CY8C21534
CY8C21434, CY8C21334, CY8C21234
Document Number: 38-12025 Rev. *O Page 16 of 45
DBB00DR0 20 # AMX_IN 60 RW A0 INT_MSK0 E0 RW
DBB00DR1 21 W AMUXCFG 61 RW A1 INT_MSK1 E1 RW
DBB00DR2 22 RW PWM_CR 62 RW A2 INT_VC E2 RC
DBB00CR0 23 # 63 A3 RES_WDT E3 W
DBB01DR0 24 # CMP_CR0 64 # A4 E4
DBB01DR1 25 W 65 A5 E5
DBB01DR2 26 RW CMP_CR1 66 RW A6 DEC_CR0 E6 RW
DBB01CR0 27 # 67 A7 DEC_CR1 E7 RW
DCB02DR0 28 # ADC0_CR 68 # A8 E8
DCB02DR1 29 W ADC1_CR 69 # A9 E9
DCB02DR2 2A RW 6A AA EA
DCB02CR0 2B # 6B AB EB
DCB03DR0 2C # TMP_DR0 6C RW AC EC
DCB03DR1 2D W TMP_DR1 6D RW AD ED
DCB03DR2 2E RW TMP_DR2 6E RW AE EE
DCB03CR0 2F # TMP_DR3 6F RW AF EF
30 70 RDI0RI B0 RW F0
31 71 RDI0SYN B1 RW F1
32 ACE00CR1 72 RW RDI0IS B2 RW F2
33 ACE00CR2 73 RW RDI0LT0 B3 RW F3
34 74 RDI0LT1 B4 RW F4
35 75 RDI0RO0 B5 RW F5
36 ACE01CR1 76 RW RDI0RO1 B6 RW F6
37 ACE01CR2 77 RW B7 CPU_F F7 RL
38 78 B8 F8
39 79 B9 F9
3A 7A BA FA
3B 7B BB FB
3C 7C BC FC
3D 7D BD DAC_D FD RW
3E 7E BE CPU_SCR1 FE #
3F 7F BF CPU_SCR0 FF #
Table 9. Register Map 0 Table: User Space (continued)
Name
Addr
(0,Hex)
Access
Name
Addr
(0,Hex)
Access
Name
Addr
(0,Hex)
Access
Name
Addr
(0,Hex)
Access
Blank fields are Reserved and must not be accessed. # Access is bit specific.
Table 10. Register Map 1 Table: Configuration Space
Name
Addr
(1,Hex)
Access
Name
Addr
(1,Hex)
Access
Name
Addr
(1,Hex)
Access
Name
Addr
(1,Hex)
Access
PRT0DM0 00 RW 40 ASE10CR0 80 RW C0
PRT0DM1 01 RW 41 81 C1
PRT0IC0 02 RW 42 82 C2
PRT0IC1 03 RW 43 83 C3
PRT1DM0 04 RW 44 ASE11CR0 84 RW C4
PRT1DM1 05 RW 45 85 C5
PRT1IC0 06 RW 46 86 C6
PRT1IC1 07 RW 47 87 C7
PRT2DM0 08 RW 48 88 C8
PRT2DM1 09 RW 49 89 C9
PRT2IC0 0A RW 4A 8A CA
PRT2IC1 0B RW 4B 8B CB
PRT3DM0 0C RW 4C 8C CC
PRT3DM1 0D RW 4D 8D CD
PRT3IC0 0E RW 4E 8E CE
PRT3IC1 0F RW 4F 8F CF
10 50 90 GDI_O_IN D0 RW
11 51 91 GDI_E_IN D1 RW
12 52 92 GDI_O_OU D2 RW
13 53 93 GDI_E_OU D3 RW
14 54 94 D4
Blank fields are Reserved and must not be accessed. # Access is bit specific.
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