CY8C21634, CY8C21534
CY8C21434, CY8C21334, CY8C21234
Document Number: 38-12025 Rev. *O Page 23 of 45
Figure 15. Basic Switch Mode Pump Circuit
ΔVPUMP_
Line
Line Regulation (over Vi range) – 5 – %VOConfiguration of footnote.[6] VO
is the “Vdd Value for PUMP
Trip” specified by the VM[2:0]
setting in the DC POR and LVD
Specification, Table 23 on page
24.
ΔVPUMP_
Load
Load Regulation – 5 – %VOConfiguration of footnote.[6] VO
is the “Vdd Value for PUMP
Trip” specified by the VM[2:0]
setting in the DC POR and LVD
Specification, Table 23 on page
24.
ΔVPUMP_
Ripple
Output Voltage Ripple (depends on cap/load) – 100 – mVpp Configuration of footnote.[6]
Load is 5 mA.
E3Efficiency 35 50 – % Configuration of footnote.[6]
Load is 5 mA. SMP trip voltage
is set to 3.25V.
E2Efficiency 35 80 – % For I load = 1mA, VPUMP =
2.55V, VBAT = 1.3V,
10 uH inductor, 1 uF capacitor,
and Schottky diode.
FPUMP Switching Frequency – 1.3 – MHz
DCPUMP Switching Duty Cycle – 50 – %
Table 21. DC Switch Mode Pump (SMP) Specifications (continued)
Symbol Description Min Typ Max Units Notes
Battery C1
D1

+PSoC

Vdd
Vss
SMP
VBAT
L1
VPUMP
Note
6. L1 = 2 mH inductor, C1 = 10 mF capacitor, D1 = Schottky diode. See Figure15.
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