Hardware Store Cycle, Soft Sequence Commands

STK14CA8

Hardware STORE Cycle

NO.	Symbols		Parameter	STK14CA8		Units	Notes
NO.	Standard	Alternate	Parameter	Min	Max	Units	Notes
	Standard	Alternate		Min	Max
31	tDELAY	tHLQZ	Hardware STORE to SRAM Disabled	1	70	μs	14
32	tHLHX		Hardware STORE Pulse Width	15		ns

NO.	Symbols	Parameter	STK14CA8		Units	Notes
NO.	Standard		Min	Max
	Standard		Min	Max
33	tSS	Soft Sequence Processing Time		70	μs	15, 16
		Figure 14. Software Sequence Commands
		33	33

Notes

14.On a hardware STORE initiation, SRAM operation continues to be enabled for time tDELAY to allow read/write cycles to complete.

15.This is the amount of time that it takes to take action on a soft sequence command. Vcc power must remain high to effectively register command.

16.Commands such as Store and Recall lock out I/O until operation is complete which further increases this time. See specific command.

Document Number: 001-51592 Rev. **

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Logic Block Diagram FeaturesDescription Cypress Semiconductor Corporation 198 Champion Court Pinouts Pin DescriptionsPin Name Description DC Characteristics Symbol Parameter Commercial Industrial Units MinAbsolute Maximum Ratings Symbol Parameter Max Units Conditions AC Test ConditionsCapacitance Sram Read Cycles #1 and #2 Sram Write Cycles #1 and #2 AutoStore/POWER UP Recall Symbols ParameterUnits Standard Alternate Min Max Software Controlled STORE/RECALL Cycle Hardware Store Cycle Soft Sequence CommandsUnits Standard Alternate Min Units Standard Min Max 16-A Mode Power Mode Selection NvSRAM Operation Hardware Recall Power UpNvSRAM AutoStore Operation Software Recall Software StoreData Protection Noise Considerations Preventing AutoStore Low Average Active Power Ordering Codes Ordering Information Pin 300 mil Ssop Pin 300 mil Soic Worldwide Sales and Design Support Products PSoC Solutions Sales, Solutions, and Legal InformationNew data sheet Document History