Diamond Systems PR-Z32-E-ST user manual Data Acquisition Circuitry I/O MAP, Base Address, Lsb, Msb

11.DATA ACQUISITION CIRCUITRY I/O MAP

11.1 Base Address

The data acquisition circuitry on Prometheus occupies a block of 16 bytes in I/O memory space. The default address range for this block is 280h – 28Fh (base address 280). This address should work for most applications, but it can be changed in the BIOS if necessary. Go to the Advanced screen and select Advanced Chipset Control, then ISA I/O Chip Select Setup. Scroll down to I/O Window io_cs3, which is used for the data acquisition circuit. Do not change any setting other than the base address or the circuit will not function properly. Make sure the selected address range does not conflict with any other circuit on the CPU or any add-on module. Here are the proper settings:

Window state:	Enabled
Base Address:	(user selectable, default 280h)
Read/Write control:	Read/Write
Window data width:	8-bits
Active Level:	Active Low
Window size:	16

A functional list of registers is provided below, and detailed bit definitions are provided on the next page and in the following chapter.

Base +	Write Function	Read Function
0	Command register	A/D LSB
1	Not used	A/D MSB
2	A/D channel register	A/D channel register
3	A/D gain and scan settings	A/D gain and status readback
4	Interrupt / DMA / counter control	Interrupt / DMA / counter control readback
5	FIFO threshold	FIFO threshold readback
6	D/A LSB	FIFO current depth
7	D/A MSB + channel no.	Interrupt and A/D channel readback
8	Digital I/O port A output	Digital I/O port A
9	Digital I/O port B output	Digital I/O port B
10	Digital I/O port C output	Digital I/O port C
11	Digital I/O direction control	Digital I/O direction control readback
12	Counter/timer D7-0	Counter/timer D7-0
13	Counter/timer D15-8	Counter/timer D15-8
14	Counter/timer D23-16	Counter/timer D23-16
15	Counter/timer control register	FPGA revision code

Prometheus CPU User Manual V1.44 Page 31