Fujitsu FR81 7.37 DIV2 (Correction When Remain is zero)

CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 177
FR81 Family CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.37
7.37 DIV2 (Correction When Remain is zero)
This is a step division instruction used for signed division.
●Assembler Format
DIV2 Ri
●Operation
if (D1==1) {
MDH + Ri → temp
}
else {
MDH - Ri → temp
}
if (Z==1) {
0 → MDH
}
●Flag Change
N, V: Unchanged.
Z: Set when the result of step division is zero, cleared otherwise. Set according to remainder of division
results, not according to quotient.
C: Set when the operation result of step division involves a carry or borrow operation, cleared otherwise.
●Classification
Multiply/Divide Instruction
●Execution Cycles
c cycle
NZVC
-C-C