FR81 Family
440 FUJITSU MICROELECTRONICS LIMITED CM71-00105-1E
APPENDIX
APPENDIX A Instruction Lists
Table A.2-11 Non-delayed Branching Instructions (24 Instructions)
The value of "2/1" in CYC Column indicates 2 cycles if branching and 1 if not branching.
It is necessary to set the Stack Flag (S) to "0" for RETI instruction execution.
Mnemonic Format OP CYC FLAG
NZVC RMW Operation Remarks Reference
JMP @Ri E 97-0 2 ---- - Ri PC 7.94
CALL label12 F D0 2 ---- - PC+2 RP,
PC+2+exts(rel11 × 2) PC 7.27
CALL @Ri E 97-1 2 ---- - PC+2 RP, Ri PC 7.28
LCALL label21 I 07-2 2 ---- - PC+4 RP
PC+4+exts(rel20 × 2) PC 7.96
RET E’ 97-2 2 ---- - RP PC 7.143
INT #u8 D 1F 1+3a ---- -
SSP-4 SSP, PS (SSP),
SSP-4 SSP, PC+2 (SSP),
0 CCR:I, 0 CCR:S,
(TBR+3FC-u8 × 4) PC
7.92
INTE E’ 9F-3 1+3a ---- -
SSP SSP, PS (SSP),
SSP SSP, PC+2 (SSP),
0 CCR:S, 4 ILM,
(TBR+3D8) PC
7.93
RETI E’ 97-3 1+2b ---- - (SSP) PC, SSP+4 SSP,
(SSP) PS, SSP+4 SSP 7.145
BNO label9 D E1 1 ---- - No branch 7.19
BRA label9 D E0 2 ---- - PC+2+exts(rel8 × 2) PC 7.19
BEQ label9 D E2 2/1 ---- - if (Z==1) then
PC+2+exts(rel8 × 2) PC 7.19
BNE label9 D E3 2/1 ---- - if (Z==0) then
PC+2+exts(rel8 × 2) PC 7.19
BC label9 D E4 2/1 ---- - if (C==1) then
PC+2+exts(rel8 × 2) PC 7.19
BNC label9 D E5 2/1 ---- - if (C==0) then
PC+2+exts(rel8 × 2) PC 7.19
BN label9 D E6 2/1 ---- - if (N==1) then
PC+2+exts(rel8 × 2) PC 7.19
BP label9 D E7 2/1 ---- - if (N==0) then
PC+2+exts(rel8 × 2) PC 7.19
BV label9 D E8 2/1 ---- - if (V==1) then
PC+2+exts(rel8 × 2) PC 7.19
BNV label9 D E9 2/1 ---- - if (V==0) then
PC+2+exts(rel8 × 2) PC 7.19
BLT label9 D EA 2/1 ---- - if (V ^ N==1) then
PC+2+exts(rel8 × 2) PC 7.19
BGE label9 D EB 2/1 ---- - if (V ^ N==0) then
PC+2+exts(rel8 × 2) PC 7.19
BLE label9 D EC 2/1 ---- - if ({V ^ N} | Z==1) then
PC+2+exts(rel8 × 2) PC 7.19
BGT label9 D ED 2/1 ---- - if ({V ^ N} | Z==0) then
PC+2+exts(rel8 × 2) PC 7.19
BLS label9 D EE 2/1 ---- - if (C or Z==1) then
PC+2+exts(rel8 × 2) PC 7.19
BHI label9 D EF 2/1 ---- - if (C or Z==0) then
PC+2+exts(rel8 × 2) PC 7.19