Fujitsu FR81 - page 319

CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 305

FR81 Family CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS

7.110

●Classification

Other instructions

●Execution Cycles

If "n" is the number of registers specified in the parameter reglist the execution cycles required are as

follows.

When n=0: 1 cycle

Otherwise: b × n cycles

●Instruction Format

●Execution Example

LDM1 (R10, R11, R12) ; Bit pattern of the instruction: 1000 1101 0001 1100

MSB LSB

10001101 reglist

90BC9363

8DF788E4

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7FFFFFC4

7FFFFFC8

7FFFFF CC

R15

7FFF FFC0

R12

R10

90BC9363

8DF788E4

7FFFFFC4

8FE39E8A

7FFFFFC0

8FE39E8A

7FFFFFC0

7FFFFFC8

7FFFFF CC

R15

7FFF FFCC

8DF788E4

8FE39E8A

R12

R10

R11

90BC9363

R11

Memory Memory

Before execution After execution

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