Gateway GT115 manual Microcode Patch Level

Microcode Patch Level		Processor Microcode Patch Level.
CPUID		Processor ID number.
CPU Stepping		Processor stepping information.
Processor L1	Instruction Cache	Processor first-level instruction cache size detected
		during POST.
		An Instruction: to speed up executable instruction fetch.
Processor L1	Data Cache	Processor first-level data cache size detected
		during POST.
		A Data Cache: to speed up data fetch and store.
Processor L2	Cache	Processor second-level cache size detected
		during POST.
Total L3 Cache per Socket		Processor third-level cache size detected
		during POST.

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