Table 52 Real Time Clock Registers
Registers Registers Function
(hex) (decimal)
0Bh | 11 | RTC Status Register B |
•Bit 7: Inhibit Update - When high, the RTC is prevented from updating.
•Bit 6: Periodic Interrupt Enable - When high, the RTC IRQ will be asserted by the periodic interrupt.
•Bit 5: Alarm Interrupt Enable - When high, the RTC IRQ will be asserted when the current time matches the alarm time.
•Bit 4: Update Ended Interrupt Enable - When high, the RTC IRQ will be asserted every time the RTC updates (once per second).
•Bit 3: Square Wave Enable - Not used.
•Bit 2: Data Mode - Sets the data format of the RTC clock/calendar registers (0=BCD, 1=binary). This is typically set to BCD mode.
•Bit 1: Hours Byte Format - Sets the hour byte to 12 or 24 hour time (0=12 hour, 1=24 hour). This is typically set to 24 hour mode.
•Bit 0: Daylight Savings Enable - When high, the RTC will automatically update itself for Daylight Savings Time. It is recommended to leave this bit low and let the operating system manage time zones and DST.
0Ch | 12 | RTC Status Register C (Read Only) |
•Bit 7: IRQ Flag - Indicates that the Real Time Clock IRQ is asserted. Goes high whenever one of the enabled interrupt conditions in Register B occurs.
•Bit 6: Periodic Flag
•Bit 5: Alarm Flag
•Bit 4: Update Ended Flag
•Bit 3-0: Reserved
Reading this register will also clear any of set flag (IRQ, Periodic, Alarm, Update Ended). Note that even if the interrupt source is not enabled in Register B, the flags in Register C bits 4, 5, and 6 may still be set.
0Dh | 13 | RTC Status Register D |
•Bit 7: Valid Time/Date (always reads 1)
•Bit 6: Reserved
•Bits
Note RTC registers that are not listed above are used by the BIOS and should be considered “Reserved”. Altering the contents of any unlisted RTC register may interfere with the operation of your cpuModule. The specific uses of the unlisted RTC registers will depend on the BIOS version loaded on the cpuModule. Contact RTD's technical support for more information.
70 CMX158886 cpuModule |
