Table 59 Reset Status Description and Priorities
I/O Address | Reset | Reset | Description |
457h | Signal | Priority1 |
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|
|
|
|
D7 | Main Power (+5V) | 2 | Main input power to cpuModule (+5V) |
D6 | CPU Core Power | 3 | CPU core powers supply |
D5 | 3 | Power supplies that are not for standby | |
|
|
| power |
D4 | Memory Power | 3 | Power to onboard memory banks |
D3 | Standby Power | 1 | Standby power supplies |
D2 | reserved | - | reserved |
D1 | PCI Reset | 4 | PCI bus reset signal |
D0 | Utility Reset | - | Utility connector push button reset2 |
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|
|
|
1.When a reset is asserted, all resets with a higher reset priority will also be asserted. For example, if the standby power reset is asserted, all other resets will also be asserted.
2.The BIOS allows the user to change the function of the utility connector’s push button reset. Even if the push button is not configured as a reset, this bit will always read a 1(asserted) when the reset button has been pushed.
78 CMX158886 cpuModule |
