SE7221BK1-E Technical Product Specification

ƒA PCI Express* bus which provides an interface to the PCI-Express* devices( Fully compliant to the PCI Express* Base Specification, Rev 1.0a)

ƒA DMI which provides an interface to the ICH6R

Other features provided by the GMCH include the following:

ƒFull support of ECC on the processor bus

ƒFull support of Intel® x4 SDDC on the memory interface with x4 DIMMs

ƒTwelve deep in-order queue, two deep defer queue

ƒFull support of un-buffered DDR2 ECC DIMMs.

ƒSupport for 1 GB DDR2 memory modules

ƒMemory scrubbing

4.1.3ICH6R

The ICH6R is a multi-function device, housed in a 609-pin mBGA device, providing a DMI bus, a PCI 32-bit/33 MHz interface, a IDE interface, an integrated Serial ATA Host controller, a USB controller, a PCI-E x4 interface, and a power management controller. Each function within the ICH6R has its own set of configuration registers. Once configured, each appears to the system as a distinct hardware controller sharing the same PCI bus interface.

The primary role of the ICH6R is to provide the gateway to all PC-compatible I/O devices and features. The board uses the following the ICH6R features:

ƒPCI 32-bit/33MHz interface

ƒLPC bus interface

ƒPCI Express* x4

ƒDMI (Direct Media Interface)

ƒIDE interface, with Ultra ATA 100/66/33 capability

ƒIntegrated Serial ATA Host controller

ƒUniversal Serial Bus (USB) 2.0 interface

ƒPC-compatible timer/counter and DMA controllers

ƒAPIC and 82C59 interrupt controller

ƒPower management

ƒSystem RTC

ƒSupports Smbus 2.0 Specification

ƒGeneral purpose I/O (GPIO)

The following are the descriptions of how each supported feature is used for ICH6R on the board.

4.1.3.1PCI Bus P32-A I/O Subsystem

The ICH6R provides a legacy 32-bit PCI subsystem and acts as the central resource on this PCI interface. P32-A supports the following embedded devices and connectors:

ƒOne Intel® ® 82541PI network controller

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Intel SE7221BK1-E manual 3 ICH6R, PCI Bus P32-A I/O Subsystem