CV-M4+/M4+CL, CV-M7+/M7+CL
5.3. Digital Output Connector for Camera Link
This pin configuration is only valid for
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| Remarks |
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| 1 | 14 |
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| Shield |
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| 2 | 15 |
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| Video signal, LEN, FEN, |
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| 2 | 16 |
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| DVAL and EEN |
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| 4 | 17 |
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| 5 | 18 |
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| Pixel clock |
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| 6 | 19 |
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| Video, LEN, FEN, DVAL, EEN |
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| Multiplexed signals |
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| 7 | 20 |
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| +/- STC |
| RXD in |
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| Or via pin #6 # 7 12pin |
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| 8 | 21 |
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| TXD out |
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| if JP 301 open |
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| 9 | 22 |
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| Trigger input |
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| *1) Or TTL on #10 12 pin |
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| 10 | 23 |
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| Multiple exposure |
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| *1) Or TTL on #11 12 pin |
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| 11 | 24 |
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| 12 | 25 |
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| 13 | 26 |
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| *1) input on |
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| Type: 26 pin MRD connector |
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| 3M |
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| 26 |
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| 14 |
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Fig. 4. Camera Link connector
The digital output signals follow the Camera Link standardized multiplexed signal output interface. The output driver is NS type DS90CR283, and the receiver is NS type DS90CR284.
The following signals are found on the Digital Output Connector:
SerTC | RXD serial data to camera |
SerTFG | TXD serial data to frame grabber |
CC1 | Trigger signal in for exposure control. |
CC2 | Trigger input for multiple exposure |
X0 to X3 | Camera Link multiplexed data out |
Xclk | Camera Link clock. Used as pixel clock. |
In the Channel Link X0 to X3 multiplexed signals the following signals are encoded.
D0 – D9 | 10 bit video data out |
LEN | Line ENable. A pulse for the beginning of a new line. |
FEN | Frame ENable. Video frame data is valid. |
DVAL | Data VALid. |
EEN | Exposure Enable. |
The polarity for LEN, FEN and Multi is positive and TRIG in negative as factory setting. It can be changed by internal
For Camera Link interface principle diagram please check Fig. 8.
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