6. BLOCK DIAGRAM

 

 

EBI2_DATA [0:15]

 

 

NAND_CS1_N

From PMIC

VREG _MSME_1.8V

EBI2 _ALE

 

 

EBI2 _CLE

 

 

EBI2_OE_N

 

Memory

EBI2_WE_N

 

NAND _READY

 

( H8BCS0SIOBAR)

 

RESOUT_N

 

2 Gb NAND

SDRAM DATA [0:31]

 

SDRAM_ADDR[0:14]

 

+

SDRAM _CLK

 

1 Gb SDRAM

SDRAM _CS_N(0)

 

 

SDRAM_ADV_N

 

 

SDRAM_ OE _N

 

 

SDRAM_WE_N

 

 

SDRAM _CLK (0)

 

 

SDRAM _DQM[0:3]

 

 

BT _UART_TXD

 

 

BT_UART _RXD

 

MSME_1. 8V

BT _UART_CTS

 

 

 

MSMP_2. 6V

BT _UART_RTS

 

 

 

BT _ANT

BT _PCM_SYNC

From BT chip ANT .

 

BT PCM IN

 

BLUE TOOTH

 

BT _PCM_OUT

 

 

 

 

BT _PCM_CLK

 

 

BT_WAKEUP _MSM

CAM_MCLK

CAM _PCLK

CAM _DATA [2:9]

CAM_HSYNC/VSYNC

MEGA _CAM_RESET_N

2M

CAMERA

CAM_I 2C _SCL/SDA

 

MEGA _CAM _PWDN

 

LCD _VSYNC _OUT

 

 

VBAT

 

 

LCD_IF_MODE

 

 

 

 

 

LCD_MAKER _ID

 

LCD _LDO_2.8V

LDO

 

 

LCD_RESET_N

 

LCD _LDO_1.8V

CHARGE

 

 

LCD

WLED _1:3

 

 

EBI2_WE_N / EBI2_OE_N

PUMP

LDO_EN

 

 

 

EBI2_DATA [0:15]

 

MLED_OUT

 

I2C_SDA , I2C_SCL

From QSC

 

 

 

 

LCD _CS _N

 

 

 

 

 

LCD_ADS

 

 

 

 

 

MICROSD_DATA [0:3]

 

 

 

 

 

MICRO DETECT_N

 

MICRO SD

 

VREG_MICROSD_3.0V

 

MICROSD_CMD/CLK

 

CONNECTOR

 

 

 

 

 

 

USIM _DATA / CLK / RESET_N

 

 

 

 

SIM

VREG_USIM_2.85V

I2C COMM.

 

 

 

 

CONNECTOR

 

 

 

Crystal

 

MSM_WAKEUP_BT

 

26 MHZ

 

BT_RESET_N

 

 

 

From SLEEP_CLK

32.768KHz

 

BT _ REG _ ON

Of QSC6270

 

 

 

QSC6270

 

 

 

 

 

VBAT

 

WLAN_SDIO[0:3]

 

 

 

WLAN_COMMEND

 

 

MSME_1.8V

 

WLAN_CLK

 

 

MSMP_2.6V

 

 

 

 

BT _UART_TXD

 

 

 

 

 

 

 

 

BT_UART _RXD

 

 

 

 

BT _UART_CTS

 

From WLAN&BT chip ANT .

WLAN&BT ANT

 

BT _UART_RTS

 

 

 

WIFI &BT

BT _PCM_SYNC

 

 

 

 

 

 

 

MODULE

BT _PCM_IN

 

 

 

 

 

 

 

 

BT _PCM_OUT

 

 

 

 

BT _PCM_CLK

 

Crystal

 

BT_WAKEUP _MSM

 

 

26 MHZ

 

MSM_WAKEUP_BT

 

From SLEEP_CLK

32.768KHz

 

BT_RESET_N

 

Of QSC6270

 

 

BT_ REG _ ON

 

 

 

OPTION

 

 

 

 

 

 

 

 

MOTOR DRIVE

DC MOTOR

KEYCODE_INTERRUPT

KEYCODE

KEYCODE__RESET

IC

KEYCODE__I2C

 

XTAL _IN

32.768KHz

 

XTAL _OUT

Oscillator

MMP_XTAL _OUT

19.2MHz

 

XO

SLIDE_DETECT

HALL _IC

 

 

SLIDE KEY

 

LED _

 

QWETY KEY

 

LED _

USB D +/-

UART1_RX/TX

VBAT

KEY_ROW[0:7]

KEY_COL[0:7]

VREG _MSME_1.8V

VBAT

VBAT

QWERTY

KEY &

NAVI _KEYMUIC_FM_AUDIO_I2C _SDA(GPIO49_P1_1.8V) MUIC /AUDIO MUIC_FM_AUDIO_I2C _SCL(GPIO50_P1_1.8V)

FM RADIO

MUIC_INT(GPIO 10_P1_1.8V)

QSC GPIO

 

FM RADIO

CP_ I2C_SDA(GPIO 70_P3_2.85V)

 

 

 

Charge Pump

CP_ I2C _SCL(GPIO71_P3_2.85V)

 

 

 

JTAG_TDI

JTAG_TCK

JTAG_TMS JTAG

JTAG_TRST_N

JTAG_TDO

JTAG_RTCK

VBAT

USB_VBUS

5PIN

BOOST_5V

 

 

MUIC_AUDIO_ I2C_SCL

 

 

 

 

HP_EAR_R

 

 

 

 

AUDIO

MUIC_AUDIO_

I2C_SDA

 

 

To.MMI CON.

HP_EAR_L

SUB

SPK_R/L

 

 

SYSTEM

 

SPK +/-

( WM9093ECS-R )

HP_R/L

 

 

 

 

 

 

MUIC

MUIC_INT

 

I2C_SDA / SCL

 

FM RADIO I2C

 

 

FM

FM RIGHT / LEFT

R ADIO

USB+/-

MICRO

 

USB _ID

MMI

 

CONN.

 

 

 

MSME_1.8V

 

 

MSMP_2.6V

 

 

 

32.768KHz

From SLEEP_CLK

 

 

Of QSC6270

MIC_BIAS

MIC

FM ANT

RCV R / L

Copyright © 2010 LG Electronics. Inc. All right reserved.

- 115 -

LGE Internal Use Only

Only for training and service purposes

 

 

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LG Electronics LG-C320 service manual 115, Memory