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| Description | Cause | Action | |||
| 0B94 | IPMB signal lines do | An SMC (Sattelite |
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| not respond. | Management |
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| Controller) error |
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| 0B95 | BMC FRU device | An error of the SROM |
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| failure. | that stores the chassis |
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| information |
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| 0B96 | BMC SDR Repository | The access error to |
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| failure. | FMEM sector in which |
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| SDR information was |
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| stored |
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| 0B97 | BMC SEL device | A BMC device (chip) |
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| failure. | failure |
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| 0B98 | BMC RAM test error. | BMC RAM error | BMC failed | 1. Turn off AC and | |
| 0B99 | BMC Fatal hardware | BMC error |
| 2. Replace Motherboard | |
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| error. |
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| 0B9A | Management | BMC error |
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| controller not |
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| responding |
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| 0B9B | Private I2C bus not |
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| responding. | private I2 C bus |
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| 0B9C | BMC internal | BMC error |
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| exception |
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| 0B9D | BMC A/D timeout | BMC error |
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| error. |
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| 0B9E | SDR repository | The error of BMC or |
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| corrupt. | the data of SEL is |
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| destroyed. |
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| 0B9F | SEL corrupt. | The error of BMC or |
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| the data of SEL is |
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| destroyed. |
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| 0BB0 | SMBIOS - SROM | Incorrect SROM data | Turn off AC and | 1. Turn off AC and | |
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| data read error. | read | replace CPU#1 | 2. Replace boards | |
| 0BB1 | SMBIOS - SROM | Incorrect SROM data |
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| data checksum bad. | checksum |
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| 0BC0 | POST detected startup | Processor 1 error |
| Turn off AC and replace | |
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| failure of 1st |
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| CPU#1 | |
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| Processor. |
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| 0BC1 | POST detected startup | Processor 2 error |
| Turn off AC and replace | |
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| failure of 2nd |
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| CPU#2 | |
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| Processor. |
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| 0BD0 | 1st SMBus device | A | SMBus Access error | 1. Turn off AC and | |
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| address not | to 1st SMBus access. |
| 2. Replace boards | |
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| acknowledged. |
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| 3. Replace internal cables | |
| 0BD1 | 1st SMBus device | The error was detected |
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| Error detected. | to 1st SMBus access |
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| 0BD2 | 1st SMBus timeout. | The timeout occurred to |
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| 1st SMBus access. |
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