µ
PD75P3116
14 Data Sheet U11369EJ3V0DS
4. Mk I AND Mk II MODE SELECTION FUNCTION
Setting the stack bank selection (SBS) register for the
µ
PD75P3116 enables the program memory to be switched
between the Mk I mode and Mk II mode. This function is applicable when using the
µ
PD75P3116 to evaluate the
µ
PD753104, 753106, or 753108.
When bit 3 of SBS is set to 1: Sets the Mk I mode (supports the Mk I mode for the
µ
PD753104, 753106, and 753108)
When bit 3 of SBS is set to 0: Sets the Mk II mode (supports the Mk II mode for the
µ
PD753104, 753106, and 753108)
4.1 Differences Between Mk I Mode and Mk II Mode
Table 4-1 lists the differences between the Mk I mode and the Mk II mode for the
µ
PD75P3116.
Table 4-1. Differences Between Mk I Mode and Mk II Mode
Item Mk I Mode Mk II Mode
Program counter PC13-0
Program memory (bytes) 16384
Data memory (bits) 512 × 4
Stack Stack bank Selectable via memory banks 0 and 1
No. of stack bytes 2 bytes 3 bytes
Instruction BRA !addr1 instruction Not available Available
CALLA !addr1 instruction
Instruction CALL !addr instruction 3 machine cycles 4 machine cycles
execution time CALLF !faddr instruction 2 machine cycles 3 machine cycles
Supported mask ROM products When set to Mk I mode: When set to Mk II mode:
µ
PD753104, 753106, and 753108
µ
PD753104, 753106, and 753108
Caution The Mk II mode supports a program area exceeding 16 KB for the 75X and 75XL Series. Therefore, this
mode is effective for enhancing software compatibility with products that have a program area of more
than 16 KB.
With regard to the number of stack bytes during execution of subroutine call instructions, the usable
area increases by 1 byte per stack compared to the Mk I mode when the Mk II mode is selected.
However, when the CALL !addr and CALLF !faddr instructions are used, the machine cycle becomes
longer by 1 machine cycle. Therefore, if more emphasis is placed on RAM use efficiency and
processing performance than on software compatibility, the Mk I mode should be used.