µ
PD75P3116
23
Data Sheet U11369EJ3V0DS
Instruction Mnemonic Operand
No. of Machine
Operation
Addressing
Skip
Group
Bytes Cycle Area
Condition
Bit transfer MOV1 CY, fmem.bit 2 2 CY ← (fmem.bit) *4
CY, pmem.@L 2 2 CY ← (pmem7-2+L3-2.bit(L1-0)) *5
CY, @H+mem.bit 2 2 CY ← (H+mem 3-0.bit) *1
fmem.bit, CY 2 2 (fmem.bit) ← CY *4
pmem.@L, CY 2 2 (pmem7-2+L3-2.bit(L1-0)) ← CY *5
@H+mem.bit, CY 2 2 (H+mem 3-0.bit) ← CY *1
Arithmetic ADDS A, #n4 1 1+S A ← A+n4 carry
XA, #n8 2 2+S XA ← XA+n8 carry
A, @HL 1 1+S A ← A+(HL) *1 carry
XA, rp’ 2 2+S XA ← XA+rp’ carry
rp’1, XA 2 2+S rp’1 ← rp’1+XA carry
ADDC A, @HL 1 1 A, CY ← A+(HL)+CY *1
XA, rp’ 2 2 XA, CY ← XA+rp’+CY
rp’1, XA 2 2 rp’1, CY ← rp’1+XA+CY
SUBS A, @HL 1 1+S A ← A–(HL) *1 borrow
XA, rp’ 2 2+S XA ← XA–rp’ borrow
rp’1, XA 2 2+S rp’1 ← rp’1–XA borrow
SUBC A, @HL 1 1 A, CY ← A–(HL)–CY *1
XA, rp’ 2 2 XA, CY ← XA–rp’–CY
rp’1, XA 2 2 rp’1, CY ← rp’1–XA–CY
AND A, #n4 2 2 A ← A ^ n4
A, @HL 1 1 A ← A ^ (HL) *1
XA, rp’ 2 2 XA ← XA ^ rp’
rp’1, XA 2 2 rp’1 ← rp’1 ^ XA
OR A, #n4 2 2 A ← A v n4
A, @HL 1 1 A ← A v (HL) *1
XA, rp’ 2 2 XA ← XA v rp’
rp’1, XA 2 2 rp’1 ← rp’1 v XA
XOR A, #n4 2 2 A ← A v n4
A, @HL 1 1 A ← A v (HL) *1
XA, rp’ 2 2 XA ← XA v rp’
rp’1, XA 2 2 rp’1 ← rp’1 v XA
Accumulator RORC A 1 1 CY ← A0, A3 ← CY, An-1 ← An
manipulation NOT A 2 2 A ← A
Increment/ INCS reg 1 1+S reg ← reg+1 reg = 0
decrement rp1 1 1+S rp1 ← rp1+1 rp1 = 00H
@HL 2 2+S (HL) ← (HL)+1 *1 (HL) = 0
mem 2 2+S (mem) ← (mem)+1 *3 (mem) = 0
DECS reg 1 1+S reg ← reg–1 reg = FH
rp’ 2 2+S rp’ ← rp’–1 rp’ = FFH