µµ
µµ
µ
PD75P3116
45
Data Sheet U11369EJ3V0DS
DC Programming Characteristics (TA = 25 ±5˚C, VDD = 6.0 ±0.25 V, VPP = 12.5 ±0.3 V, VSS = 0 V)
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
Input voltage, high VIH1 Except X1 and X2 pins 0.7VDD VDD V
VIH2 X1, X2 VDD – 0.5 VDD V
Input voltage, low VIL1 Except X1 and X2 pins 0 0.3VDD V
VIL2 X1, X2 0 0.4 V
Input leakage current ILI VIN = VIL or VIH 10
µ
A
Output voltage, high VOH IOH = –1 mA VDD – 1.0 V
Output voltage, low VOL IOL = 1.6 mA 0.4 V
VDD power supply current IDD 30 mA
VPP power supply current IPP MD0 = VIL, MD1 = VIH 30 mA
Cautions 1. Do not exceed +13.5 V for VPP, including the overshoot.
2. VDD must be applied before VPP, and cut after VPP.AC Programming Characteristics (TA = 25 ±5˚C, VDD = 6.0 ±0.25 V, VPP = 12.5 ±0.3 V, VSS = 0 V)Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
Address setup timeNote (to MD0↓)tAS 2
µ
s
MD1 setup time (to MD0↓)tM1S 2
µ
s
Data setup time (to MD0↓)tDS 2
µ
s
Address hold timeNote (from MD0↑)tAH 2
µ
s
Data hold time (from MD0↑)tDH 2
µ
s
Data output float delay time from MD0↑tDF 0 130 ns
VPP setup time (to MD3↑)tVPS 2
µ
s
VDD setup time (to MD3↑)tVDS 2
µ
s
Initial program pulse width tPW 0.95 1.0 1.05 ms
Additional program pulse width tOPW 0.95 21.0 ms
MD0 setup time (to MD1↑)tM0S 2
µ
s
Data output delay time from MD0↓tDV MD0 = MD1 = VIL 1
µ
s
MD1 hold time (from MD0↑)tM1H tM1H + tM1R ≥ 50
µ
s2
µ
s
MD1 recovery time (from MD0↓)tM1R 2
µ
s
Program counter reset time tPCR 10
µ
s
X1 input high-/low-level width tXH, tXL 0.125
µ
s
X1 input frequency fX4.19 MHz
Initial mode set time tI2
µ
s
MD3 setup time (to MD1↑)tM3S 2
µ
s
MD3 hold time (from MD1↓)tM3H 2
µ
s
MD3 setup time (to MD0↓)tM3SR
During program memory read
2
µ
s
Data output delay time from AddressNote tDAD
During program memory read
2
µ
s
Data output hold time from AddressNote tHAD
During program memory read
0 130 ns
MD3 hold time (from MD0↑)tM3HR
During program memory read
2
µ
s
Data output float delay time from MD3↓tDFR
During program memory read
2
µ
s
Note The internal address signal is incremented by 1 at the rising edge of the fourth X1 input and is not connected toa pin.