µµ
µµ
µ
PD75P3116
35
Data Sheet U11369EJ3V0DS
DC Characteristics (TA = –40 to +85˚C, VDD = 1.8 to 5.5 V)
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit
Output current, low IOL Per pin 15 mA
Total of all pins 150 mA
Input voltage, high VIH1 Ports 2, 3, 8, and 9 2.7 VDD 5.5 V 0.7VDD VDD V
1.8 VDD < 2.7 V 0.9VDD VDD V
VIH2 Ports 0, 1, 6, RESET 2.7 VDD 5.5 V 0.8VDD VDD V
1.8 VDD < 2.7 V 0.9VDD VDD V
VIH3 Port 5 2.7 VDD 5.5 V 0.7VDD 13 V
(N-ch open-drain) 1.8 VDD < 2.7 V 0.9VDD 13 V
VIH4 X1, XT1
VDD 0.1
VDD V
Input voltage, low VIL1 Ports 2, 3, 5, 8, and 9 2.7 VDD 5.5 V 0 0.3VDD V
1.8 VDD < 2.7 V 0 0.1VDD V
VIL2 Ports 0, 1, 6, RESET 2.7 VDD 5.5 V 0 0.2VDD V
1.8 VDD < 2.7 V 0 0.1VDD V
VIL3 X1, XT1 0 0.1 V
Output voltage, high VOH
SCK, SO, Ports 2, 3, 6, 8, and 9 IOH = 1.0 mA
VDD 0.5
V
Output voltage, low VOL1
SCK, SO, Ports 2, 3, 5, 6, 8, and 9
IOL = 15 mA, 0.2 2.0 V
VDD =
4.5 to 5.5 V
IOL = 1.6 mA 0.4 V
VOL2 SB0, SB1 When N-ch open-drain 0.2VDD V
pull-up resistor 1 k
Input leakage ILIH1 VIN = VDD Pins other than X1, XT1 3
µ
A
current, high ILIH2 X1, XT1 20
µ
A
ILIH3 VIN = 13 V Port 5 (N-ch open-drain) 20
µ
A
Input leakage ILIL1 VIN = 0 V Pins other than X1, XT1, and Port 5 3
µ
A
current, low ILIL2 X1, XT1 20
µ
A
ILIL3 Port 5 (N-ch open-drain) 3
µ
A
When another instruction than input
instruction is executed
VDD = 1.8 to 5.5 V 30
µ
A
VDD = 5.0 V 10 27
µ
A
VDD = 3.0 V 38
µ
A
Output leakage ILOH1 VOUT = VDD
SCK, SO/SB0, SB1, Ports 2, 3, 6, 8, and 9
3
µ
A
current, high ILOH2 VOUT = 13 V Port 5 (N-ch open-drain) 20
µ
A
Output leakage ILOL VOUT = 0 V 3
µ
A
current, low
On-chip pull-up resistor RLVIN = 0 V Ports 0, 1, 2, 3, 6, 8, and 9 50 100 200 k
(Excluding P00 pin)
Port 5
(N-ch open-drain)
When input
instruction is
executed