PMC-Sierra Pm25LV010 manual Dc Characteristics, Pm25LV512/010, Symbol, Parameter, Condition, Units

Models: Pm25LV512 Pm25LV010

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PMC	Pm25LV512/010

Applicable over recommended operating range from:

TAC = 0°C to +85°C, V CC = +2.7 V to +3.6 V (unless otherwise noted).

Programmable Microelectronics Corp.

Issue Date: February, 2004, Rev: 1.4

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Contents

Pm25LV512 / Pm25LV010 With 25 MHz SPI Bus Interface FEATURES512 Kbit / 1 Mbit 3.0 Volt-only, Serial Flash Memory GENERAL DESCRIPTIONPm25LV512/010 CONNECTION DIAGRAMSPIN DESCRIPTIONS Temperature Range PRODUCT ORDERING INFORMATIONPm25LV512/010 Part NumberSPI Chip Block Diagram BLOCK DIAGRAMPm25LV512/010 Memory ArrayPm25LV512/010 SERIAL INTERFACE DESCRIPTIONFigure 1. Bus Master and SPI Memory Devices SPI MODES SERIAL INTERFACE DESCRIPTION CONTINUEDPm25LV512/010 Figure 2. SPI ModesPm25LV512/010 DEVICE OPERATIONProduct Identification DataTable 3. Status Register Format Pm25LV512/010Table 5. Block Write Protect Bits Pm25LV512/010Address Pm25LV512/010Pm25LV512 Pm25LV010Table 8. Block Addresses Pm25LV512/010DC AND AC OPERATING RANGE ABSOLUTE MAXIMUM RATINGSPm25LV512/010 Part NumberSymbol DC CHARACTERISTICSPm25LV512/010 ParameterSymbol AC CHARACTERISTICSPm25LV512/010 ParameterPm25LV512/010 AC CHARACTERISTICS CONTINUEDAC WAVEFORMS1 OUTPUT TEST LOADIssue Date February, 2004, Rev AC CHARACTERISTICS CONTINUEDPm25LV512/010 COUTPm25LV512/010 TIMING DIAGRAMSRDID Timing WREN TimingRDSR Timing Pm25LV512/010WRSR Timing READ TimingPm25LV512/010 SECTOR ERASE Timing Pm25LV512/010BLOCK ERASE Timing CHIP ERASE TimingPROGRAM/ERASE PERFORMANCE RELIABILITY CHARACTERISTICSPm25LV512/010 Issue Date February, 2004, Rev PACKAGE TYPE INFORMATION 8SPm25LV512/010 Issue Date February, 2004, Rev PACKAGE TYPE INFORMATION CONTINUED 8QPm25LV512/010 3.40Pm25LV512/010 REVISION HISTORYDate Revision No