PMC-Sierra Pm25LV010 manual Ac Characteristics, Pm25LV512/010, Symbol, Parameter, Units

Models: Pm25LV512 Pm25LV010

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PMC	Pm25LV512/010

Applicable over recommended operating range from TA = 0°C to +85°C, V CC = +2.7 V to +3.6 V CL = 1TTL Gate and 30 pF (unless otherwise noted).

Min

Typ

Max

fFR	Clock Frequency for	0		25	MHz
fFR	FAST_READ	0		25	MHz
	FAST_READ

fR	Clock Frequency for READ instructions	0		20	MHz

tRI	Input Rise Time			20	ns
tFI	Input Fall Time			20	ns
tCKH	SCK High Time	20			ns
tCKL	SCK Low Time	20			ns
tCEH	CE High Time	25			ns
tCS	CE Setup Time	25			ns
tCH	CE Hold Time	25			ns
tDS	Data In Setup Time	5			ns
tDH	Data in Hold Time	5			ns
tHS	Hold Setup Time	15			ns
tHD	Hold Time	15			ns
tV	Output Valid			15	ns

tOH	Output Hold Time	0			ns
tLZ	Hold to Output Low Z			200	ns
tHZ	Hold to Output High Z			200	ns
tDIS	Output Disable Time			100	ns
tEC	Secter/Block/Chip Erase Time		40	100	ms
tpp	Page Program Time		2	5	ms
tw	Write Status Register time		40	100	ms

Programmable Microelectronics Corp.

Issue Date: February, 2004, Rev: 1.4

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Contents

512 Kbit / 1 Mbit 3.0 Volt-only, Serial Flash Memory With 25 MHz SPI Bus Interface FEATURESPm25LV512 / Pm25LV010 GENERAL DESCRIPTIONPIN DESCRIPTIONS CONNECTION DIAGRAMSPm25LV512/010 Pm25LV512/010 PRODUCT ORDERING INFORMATIONTemperature Range Part NumberPm25LV512/010 BLOCK DIAGRAMSPI Chip Block Diagram Memory ArrayFigure 1. Bus Master and SPI Memory Devices SERIAL INTERFACE DESCRIPTIONPm25LV512/010 Pm25LV512/010 SERIAL INTERFACE DESCRIPTION CONTINUEDSPI MODES Figure 2. SPI ModesProduct Identification DEVICE OPERATIONPm25LV512/010 DataPm25LV512/010 Table 3. Status Register FormatPm25LV512/010 Table 5. Block Write Protect BitsPm25LV512 Pm25LV512/010Address Pm25LV010Pm25LV512/010 Table 8. Block AddressesPm25LV512/010 ABSOLUTE MAXIMUM RATINGSDC AND AC OPERATING RANGE Part NumberPm25LV512/010 DC CHARACTERISTICSSymbol ParameterPm25LV512/010 AC CHARACTERISTICSSymbol ParameterAC WAVEFORMS1 AC CHARACTERISTICS CONTINUEDPm25LV512/010 OUTPUT TEST LOADPm25LV512/010 AC CHARACTERISTICS CONTINUEDIssue Date February, 2004, Rev COUTRDID Timing TIMING DIAGRAMSPm25LV512/010 WREN TimingWRSR Timing Pm25LV512/010RDSR Timing READ TimingPm25LV512/010 BLOCK ERASE Timing Pm25LV512/010SECTOR ERASE Timing CHIP ERASE TimingPm25LV512/010 RELIABILITY CHARACTERISTICSPROGRAM/ERASE PERFORMANCE Pm25LV512/010 PACKAGE TYPE INFORMATION 8SIssue Date February, 2004, Rev Pm25LV512/010 PACKAGE TYPE INFORMATION CONTINUED 8QIssue Date February, 2004, Rev 3.40Date REVISION HISTORYPm25LV512/010 Revision No