PMC-Sierra manual PACKAGE TYPE INFORMATION 8S, Pm25LV512/010, Issue Date February, 2004, Rev

Models: Pm25LV512 Pm25LV010

1 24

Page 22

PMC	Pm25LV512/010

8-Pin JEDEC Small Outline Integrated Circuit (SOIC) Package (measure in millimeters)

Top View

Side View

4.00

3.80

6.20

5.80

End View

45º

5.00

4.80

1.75

1.35

0.51

0.33

1.27 BSC

0.25

0.10

1.27

0.40

0.25

0.19

Programmable Microelectronics Corp.

Issue Date: February, 2004, Rev: 1.4

Image 22

Contents

512 Kbit / 1 Mbit 3.0 Volt-only, Serial Flash Memory With 25 MHz SPI Bus Interface FEATURESPm25LV512 / Pm25LV010 GENERAL DESCRIPTIONPm25LV512/010 CONNECTION DIAGRAMSPIN DESCRIPTIONS Pm25LV512/010 PRODUCT ORDERING INFORMATIONTemperature Range Part NumberPm25LV512/010 BLOCK DIAGRAMSPI Chip Block Diagram Memory ArrayPm25LV512/010 SERIAL INTERFACE DESCRIPTIONFigure 1. Bus Master and SPI Memory Devices Pm25LV512/010 SERIAL INTERFACE DESCRIPTION CONTINUEDSPI MODES Figure 2. SPI ModesProduct Identification DEVICE OPERATIONPm25LV512/010 DataPm25LV512/010 Table 3. Status Register FormatPm25LV512/010 Table 5. Block Write Protect BitsPm25LV512 Pm25LV512/010Address Pm25LV010Pm25LV512/010 Table 8. Block AddressesPm25LV512/010 ABSOLUTE MAXIMUM RATINGSDC AND AC OPERATING RANGE Part NumberPm25LV512/010 DC CHARACTERISTICSSymbol ParameterPm25LV512/010 AC CHARACTERISTICSSymbol ParameterAC WAVEFORMS1 AC CHARACTERISTICS CONTINUEDPm25LV512/010 OUTPUT TEST LOADPm25LV512/010 AC CHARACTERISTICS CONTINUEDIssue Date February, 2004, Rev COUTRDID Timing TIMING DIAGRAMSPm25LV512/010 WREN TimingWRSR Timing Pm25LV512/010RDSR Timing READ TimingPm25LV512/010 BLOCK ERASE Timing Pm25LV512/010SECTOR ERASE Timing CHIP ERASE TimingPROGRAM/ERASE PERFORMANCE RELIABILITY CHARACTERISTICSPm25LV512/010 Issue Date February, 2004, Rev PACKAGE TYPE INFORMATION 8SPm25LV512/010 Pm25LV512/010 PACKAGE TYPE INFORMATION CONTINUED 8QIssue Date February, 2004, Rev 3.40Date REVISION HISTORYPm25LV512/010 Revision No