4.INTERRUPT LEVEL (IRQ)

The ES-100D allows the use of any interrupt level in the range IRQ2 to IRQ7, IRQ10 to IRQ12, IRQ14, or IRQ15, selected using jumper pack J2. In Figure 6, the factory default setting of IRQ3 is shown. To select a different IRQ, move the jumper to the appropriate position on J2.

IRQ2

IRQ3

IRQ4

IRQ5

IRQ6

IRQ7

IRQ10

IRQ11

IRQ12

IRQ14

IRQ15

12

13

14

15

16

17

18

19

20

21

22

1

2

3

4

5

6

7

8

9

10

11

 

 

 

J2

---Default is IRQ 3

 

 

Figure 6 --- Interrupt level (IRQ) selection

Interrupt Sharing

All ports on the ES-100D share the same interrupt level. In addition, an interrupt sharing circuit allows the ES-100D to share its interrupt with another Quatech adapter supporting sharable interrupts. In either case, the software driving the serial ports must determine which port or ports are requesting service when an interrupt is generated.

The ES-100D signals a hardware interrupt when any port requires service. The interrupt signal is maintained until no port requires service. Because the ISA bus is edge-sensitive, this behavior forces the interrupt service routine to ensure that all ports are checked before exiting. A way to do this is to poll each port until an interrupting port is found. After servicing the port, all ports should be checked again. If any interrupting port is left unserviced the ES-100D will be unable to signal any further interrupts.

Interrupt Status register

The ES-100D is equipped with an interrupt status register which can be used to simplify the servicing of shared interrupts. If this feature is enabled, the read-only interrupt status register is accessed in place of the scratchpad of any given UART at base address + 7. Virtually no commercially available software makes use of the scratchpad register. The choice of using the interrupt status register or the UART scratchpads is made using position 6 of switch SW2 as shown in Figure 7.

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Quatech ES-100D User's Manual

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Quatech ES-100 user manual Interrupt Level IRQ, Interrupt Sharing, Interrupt Status register