INSTRUCTION SET S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
6-18
BCP — Bit Compare
BCP dst,src.b
Operation: dst(0) – src(b)
The specified bit of the source is compared to (subtracted from) bit zero (LSB) of the destination.
The zero flag is set if the bits are the same; otherwise it is cleared. The contents of both
operands are unaffected by the comparison.
Flags: C: Unaffected.
Z: Set if the two bits are the same; cleared otherwise.
S: Cleared to "0".
V: Undefined.
D: Unaffected.
H: Unaffected.
Format:
Bytes Cycles Opcode
(Hex) Addr Mode
dst src
opc dst | b | 0 src 3 6 17 r0 Rb
NOTE: In the second byte of the instruction format, the destination address is four bits, the bit address 'b' is
three bits, and the LSB address value is one bit in length.
Example: Given: R1 = 07H and register 01H = 01H:
BCP R1,01H.1 → R1 = 07H, register 01H = 01H
If destination working register R1 contains the value 07H (00000111B) and the source register
01H contains the value 01H (00000001B), the statement "BCP R1,01H.1" compares bit one of
the source register (01H) and bit zero of the destination register (R1). Because the bit values are
not identical, the zero flag bit (Z) is cleared in the FLAGS register (0D5H).