TIMER 1 S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
11-4
TWO 8-BIT TIMERS MODE (TIMER A and B) OVERVIEW
The 8-bit timer A and B are the 8-bit general-purpose timers. Timer A and B have the interval timer mode by using
the appropriate TACON and TBCON setting, respectively.
Timer A and B have the following functional components:
• Clock frequency divider with multiplexer
− fxx divided by 512, 256, 64, 8 or 1, fxt, and T1CLK (External clock) for timer A
− fxx divided by 512, 256, 64 or 8 and fxt for timer B
• 8-bit counter (TACNT, TBCNT), 8-bit comparator, and 8-bit reference data register (TADATA, TBDATA)
• Timer A have I/O pin for match output (TAOUT)
• Timer A match interrupt (IRQ 0, vector F0H) generation
• Timer A control register, TACON (set 1, bank 1, E6H, read/write)
• Timer B have I/O pin for match output (TBOUT)
• Timer B match interrupt (IRQ 0, vector F2H) generation
• Timer B control register, TBCON (set 1, bank 1, E7H, read/write)
FUNCTION DESCRIPTION
Interval Timer Function
The timer A and B module can generate an interrupt: the timer A match interrupt (TAINT) and the timer B match
interrupt (TBINT). TAINT belongs to the interrupt level IRQ 0, and is assigned a separate vector address, F0H.
TBINT belongs to the interrupt level IRQ 0 and is assigned a separate vector address, F2H.
The TAINT and TBINT pending condition should be cleared by software after they are serviced.
In interval timer mode, a match signal is generated when the counter value is identical to the values written to the
TA or TB reference data registers, TADATA and TBDATA. The match signal generates corresponding match
interrupt (TAINT, vector F0H; TBINT, vector F2H) and clears the counter.
If, for example, you write the value 10H to TBDATA, "0" to TACON.7, and 0EH to TBCON, the counter will
increment until it reaches 10H. At this point, the TB interrupt request is generated, the counter value is reset, and
counting resumes.
Timer A and B Control Register (TACON, TBCON)
You use the timer A and B control register, TACON and TBCON, to
• Enable the timer A (interval timer mode) and B operating (interval timer mode)
• Select the timer A and B input clock frequency
• Clear the timer A and B counter, TACNT and TBCNT
• Enable the timer A and B interrupts
• Clear timer A and B interrupt pending conditions