S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X CONTROL REGISTER
4-7
CLKCON — System Clock Control Register D4H Set 1
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
Reset Value 0 – – 0 0 – – –
Read/Write R/W – – R/W R/W – – –
Addressing Mode Register addressing mode only
.7 Oscillator IRQ Wake-up Function Bit
0 Enable IRQ for main wake-up in power down mode
1 Disable IRQ for main wake-up in power down mode
.6–.5 Not used for the S3C8275X/C8278X/C8274X (must keep always “0”)
.4–.3 CPU Clock (System Clock) Selection Bits (note)
0 0 fxx/16
0 1 fxx/8
1 0 fxx/2
1 1 fxx
.2–.0 Not used for the S3C8275X/C8278X/C8274X (must keep always “0”)
NOTE: After a reset, the slowest clock (divided by 16) is selected as the system clock. To select faster clock speeds, load
the appropriate values to CLKCON.3 and CLKCON.4.