INSTRUCTION SET S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
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DA — Decimal Adjust
DA (Continued)
Example: Given: Working register R0 contains the value 15 (BCD), working register R1 contains
27 (BCD), and address 27H contains 46 (BCD):
ADD R1,R0 ; C ← "0", H ← "0", Bits 4–7 = 3, bits 0–3 = C, R1 ← 3CH
DA R1 ; R1 ← 3CH + 06
If addition is performed using the BCD values 15 and 27, the result should be 42. The sum is
incorrect, however, when the binary representations are added in the destination location using
standard binary arithmetic:
0 0 0 1 0 1 0 1 15
+ 0 0 1 0 0 1 1 1 27
0 0 1 1 1 1 0 0 = 3CH
The DA instruction adjusts this result so that the correct BCD representation is obtained:
0 0 1 1 1 1 0 0
+ 0 0 0 0 0 1 1 0
0 1 0 0 0 0 1 0 = 42
Assuming the same values given above, the statements
SUB 27H,R0 ; C ← "0", H ← "0", Bits 4–7 = 3, bits 0–3 = 1
DA @R1 ; @R1 ← 31–0
leave the value 31 (BCD) in address 27H (@R1).