Samsung Figure 9-7. Port 1 High-Byte Control Register (P1CONH) , Figure 9-8. Port 1 Low-Byte Control Register (P1CONL)

I/O PORTS S3C8275X/F8275X/C8278X/F8278X/C8274X/F8274X
9-8
Port 1 Control Register, High Byte (P1CONH)
E7H, Set 1, Bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
P1.7/INT7
P1CONH bit-pair pin configuration settings:
00
01
10
11
Push-pull output mode
Not available
P1.6/INT6 P1.5/INT5 P1.4/INT4
N-channel open-drain output mode
Schmitt trigger input mode
Figure 9-7. Port 1 High-Byte Control Register (P1CONH)
Port 1 Control Register, Low Byte (P1CONL)
E8H, Set 1, Bank 0, R/W
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
P1.3/INT3
P1CONL bit-pair pin configuration settings:
00
01
10
11 Alternative function (SCK, SO)
P1.2/SI P1.1/SO P1.0/SCK
Schmitt trigger input mode (SI, SCK)
N-channel open-drain output mode
Push-pull output mode
Figure 9-8. Port 1 Low-Byte Control Register (P1CONL)