3 SOFTWARE IMPLEMENTATION | |
|
|
Figure
CMP1INT ISR (hard lock)
For surge protection
Start
Clr pending bit
Set P0.4(PWM) to input without
PWMCON = 0
End
CMP2INT ISR (soft lock)
For IGBT over voltage protection
Start
Clr pending bit
Not mandatory
End
Figure 3-3 Interrupt Service Routine Diagram
NOTE: When hard lock happens, the PWM returns to the safe value immediately.
When soft lock happens. The PWM returns to the safe value immediately for the current PWM cycle. And the PWMDATA will be reloaded as PWMPDATA, usually a smaller one, from the next cycle on.
FAN work flow | BUZ work flow |
Start |
|
Power flag = 0? | N |
| |
Y |
|
IGBT temp < 55 | N |
| |
Y |
|
Fan Off | Fan On |
Start
Beaming for 0.2s
N | Power flag = 1? |
|
|
|
|
| |
| Y |
|
|
| Pan flag = 1? | N |
|
|
|
| |
| Y |
|
|
| No pan detected? | Error lasts for 2s? | N |
|
| ||
| Y | Y |
|
| Beaming for 0.2s |
|
|
Figure 3-4 Fan and BUZ Workflow
Figure
Buzzer is mainly used for information indication. Besides the first beaming at power on, it only gives alarm when some error lasts for 2sec or no pan is detected after trying 30 times