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TABLE OF TABLES
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CHAPTER 1 SCOPE
1.1 User Definition
1.2 Manual Organization
1.3 Terminology and Conventions
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1.4 Reference
CHAPTER 2 DESCRIPTION
2.1 Introduction
2.2 Key Features
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2.3 Standards and Regulations
2.4 Hardware Requirements
CHAPTER 3 SPECIFICATIONS
3.1 Specification Summary
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3.2 Physical Specifications
3.3 Logical Configurations
3.4 Performance Specifications
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3.5 Power Requirements
3.6 Environmental Specifications
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3.7 Reliability Specifications
CHAPTER 4 INSTALLATION
4.1 Space Requirements
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4.2 Unpacking Instructions
4.3 Mounting
4.3.1 Orientation
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4.3.2 Clearance
4.3.3 Ventilation
4.4 Cable Connectors
4.4.1 DC Power Connector
4.4.2 AT-Bus Interface Connector
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4.5 Jumper Block Configurations
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4.6 Drive Installation
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4.7 System Startup Procedure
4.7.1 Drive Installation to Access the Full Capacity Using 32GB Clip
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CHAPTER 5 DISK DRIVE OPERATION
5.1 Head / Disk Assembly (HDA)
5.1.1 Base Casting Assembly
5.1.2 DC Spindle Motor Assembly
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5.1.3 Disk Stack Assembly
5.1.4 Head Stack Assembly
5.1.5 Voice Coil Motor and Actuator Latch Assemblies
5.1.6 Air Filtration System
5.2 Drive Electronics
5.2.1 Digital Signal Process and Interface Controller
5.2.2 AT Disk Controller
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5.2.3 Read/Write IC
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5.3 Servo System
5.4 Read and Write Operations
5.4.1 The Read Channel
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5.4.2 The Write Channel
5.5 Firmware Features
5.5.1 Read Caching
5.5.2 Write Caching
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5.5.3 Defect Management
5.5.4 Automatic Defect Allocation
5.5.5 Multi-burst ECC Correction
5.5.6 SMART
5.5.7 AAM
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CHAPTER 6 AT INTERFACE AND ATA COMMANDS
6.1 Introduction
6.2 Physical Interface
6.2.1 Signal Conventions
6.2.2 Signal Summary
6.2.3 Signal Descriptions
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6.3 Logical Interface
6.3.1 General
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6.3.2 I/O Register - Address
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6.3.3 Control Block Register Descriptions
6.3.4 Command Block Register Descriptions
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6.4 At Command Register Descriptions
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6.4.1 Check Power Mode (98h, E5h)
6.4.2 Download Micro Code (92h)
6.4.3 Execute Device Diagnostics (90h)
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6.4.4 Flush Cache (E7h)
6.4.5 Format Track (50h)
6.4.6 Identify Device (ECh)
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6.4.7 Idle (97h,E3h)
6.4.8 Idle Immediate (95h,E1h)
6.4.9 Initialize Device Parameters (91h)
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6.4.10 Read Buffer (E4h)
6.4.11 Read DMA (C8h:with retry, C9h:without retry)
6.4.12 Read Long (22h:with retry, 23h: without retry)
6.4.13 Read Multiple Command (C4h)
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6.4.14 Read Native Max Address (F8h)
6.4.15 Read Sector(s) (20h:with retry, 21h:without retry)
6.4.16 Read Verify Sector(s) (40h:with retry, 41h:without retry)
6.4.17 Recalibrate (1xh)
6.4.18 Seek (7xh)
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6.4.19 Set Features (EFh)
6.4.20 Set Max Address (F9h)
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6.4.21 Set Multiple Mode (C6h)
6.4.22 Sleep (99h, E6h)
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6.4.23 Standby (96h,E2h)
6.4.24 SMART (B0h)
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6.4.25 Standby (96h, E2h)
6.4.26 Standby Immediate (94h, E0h)
6.4.27 Write Buffer (E8h)
6.4.28 Write Long (32h:with retry, 33h:without retry)
6.4.29 Write DMA (CAh)
6.4.30 Write Multiple Command (C5h)
6.4.31 Write Sector(s) (30h:with retry, 31h:without retry)
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6.5 Programming Requirements
6.5.1 Reset Response
6.5.2 Error Posting
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6.5.3 Power Conditions
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6.6 Protocol Overview
6.6.1 PIO Data in Commands
6.6.2 PIO Data Out Commands
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6.6.3 Non-Data Commands
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6.6.4 DMA Data Transfer Commands
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6.7 Timing
6.7.1 Register transfers
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Figure 6-1 Register transfer to/from device
6.7.2 PIO data transfers
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Figure 6-2 PIO data transfer to/from device
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6.7.3 Multiword DMA data transfer
Figure 6-3 Multiword DMA data transfer
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6.7.4 Ultra DMA data transfer
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CHAPTER 7 MAINTENANCE
7.1 General Information
7.2 Maintenance Precautions
7.3 Service And Repair
