DISK DRIVE OPERATION SpinPoint V40 Product Manual 90
t0
ADDR valid
(See note 1)
t1 t2 t9
t2i
DIOR-/DIOW-
WRITE
DD(7:0)
(See note 2)
t3 t4
READ
DD(7:0)
(See note 2)
t5 t6
t6z
IORDY
(See note 3,3-1)
tA
IORDY
(See note 3,3-2) tC
tRD
IORDY
(See note 3,3-3)
tB tC
NOTES
1 Device address consists of signals CS0-, CS1- and DA(2:0)
2 Data consists of DD(7:0).
3 The negation of IORDY by the device is used to extend the PIO cycle. The determination of whether the
cycle is to be extended is made by the host after tA from the assertion of DIOR- or DIOW-. The
assertion and negation of IORDY are described in the following three cases:
3-1 Device never negates IORDY, devices keeps IORDY released: no wait is generated.
3-2 Device negates IORDY before tA, but causes IORDY to be asserted before tA. IORDY is released
prior to negation and may be asserted for no more than 5 ns before release: no wait generated.
3-3 Device negates IORDY before tA. IORDY is released prior to negation and may be asserted for no
more than 5 ns before release: wait generated. The cycle completes after IORDY is reasserted. For
cycles where a wait is generated and DIOR- is asserted, the device shall place read data on DD(7:0)
for tRD before asserting IORDY.
4 DMACK – Shall remain negated during a register transfer.
Figure 6-1 Register transfer to/from device