Ultra DMA data transfer | Samsung spinpoint v40 guide

DISK DRIVE OPERATION

6.7.4 Ultra DMA data transfer

Figures 6-4 through 6-13 define the timings associated with all phases of Ultra DMA bursts. Table 6-19 contains the values for the timings for each of the Ultra DMA modes.

6.7.4.1Initiating an Ultra DMA data in burst

The values for the timings for each of the Ultra DMA modes are contained in 6.7.4.2.

DMARQ (device)

tUI

DMACK-

(host)

tACK tENV tFS

STOP	tZAD
STOP
(host)

HDMARDY-

(host)

DSTROBE

(device)

tACK tENV tFS

tZAD

tZIORDY

tAZ

tDVS

tDVH

DD(15:0)

tACK

DA0, DA1, DA2,

CS0-, CS1-

NOTE − The definitions for the STOP, HDMARDY and DSTROBE signal lines are not in effect until DMARQ and DMACK are asserted.

Figure 6-4 Initiating an Ultra DMA data in burst

96	SpinPoint V40 Product Manual

Image 104

Samsung spinpoint v40, 3.5 hard disk drives manual Ultra DMA data transfer, Initiating an Ultra DMA data in burst

Contents

Spinpoint SpinPoint V40 Product Manual Table of Contents Smart Ervo S Ystem EAD and W Rite O PerationsIrmware F Eatures Timing Programming RequirementsProtocol Overview Maintenance Precautions Service and Repair107 General Information Table of Figures Page Scope User DefinitionManual Organization Commands and Messages Terminology and ConventionsComputer Message Format C/S Reference Description Key FeaturesIntroduction Standards and Regulations Hardware Requirements Specification Summary Specifications Physical Specifications Logical Configurations Performance Specifications Power Requirements 28.71 Environmental Specifications SV6003H SV6014H SV8004H Reliability Specifications Mtbf POH Installation Space Requirements Orientation Unpacking InstructionsMounting 2Mounting Dimensions in Millimeters Clearance 3Mounting-Screw Clearance Cable Connectors DC Power ConnectorAT-Bus Interface Connector Ventilation SpinPoint V40 Product Manual Jumper Block Configurations Options for Jumper Block Configuration Drive Installation 7DC Power Connector and AT-Bus Interface Cable Connections System Startup Procedure Parameter System Setup Head / Disk Assembly HDA Base Casting AssemblyDC Spindle Motor Assembly Disk Drive Operation Exploded Mechanical View Disk Stack Assembly Head Stack AssemblyVoice Coil Motor and Actuator Latch Assemblies Air Filtration System AT Disk Controller Digital Signal Process and Interface ControllerDrive Electronics 2SID2001 AT Controller Block Diagram Host Interface Control Block Buffer Control Block Disk Control Block SpinPoint V40 Product Manual Power Management Read/Write ICDisk ECC Control Block Frequency Synthesizer Time Base Generator Automatic Gain ControlAsymmetry Correction Circuitry ASC Analog Anti-Aliasing Low Pass Filter 3Read/Write 88C5200 Read Channel Servo SystemRead and Write Operations Read Caching Firmware FeaturesWrite Channel Write Caching Defect Management Automatic Defect AllocationMulti-burst ECC Correction Smart Blank Physical Interface Signal ConventionsSignal Summary Signal Descriptions DMACK- DMA Acknowledge Dmarq DMA RequestIntrq Drive Interrupt IOCS16- Drive 16-bit I/O Iordy I/O Channel Ready PDIAG- Passed DiagnosticsRESET- Drive Reset SD8 SD6 SD9 SD5 SD4SD3 SD2 Drive Drive Host DIR Logical Interface GeneralBit Conventions Environment SpinPoint V40 Product Manual Command Block Registers 2 I/O Register AddressControl Block Registers N N N A a a Control Block Register Descriptions Alternate Status Register 3F6hDrive Address Register 3F7h Device Control Register 3F6h Command Block Register Descriptions Features Register 1F1hError Register 1F1h Data Register 1F0h Command Register 1F7h Sector Count Register 1F2hCylinder High Register 1F5h Cylinder Low Register 1F4h Status Register 1F7h BSY Drdy DWF DSC DRQ Corr IDX ERR At Command Register Descriptions Command Parameter Used SpinPoint V40 Product Manual Download Micro Code 92h Check Power Mode 98h, E5hExecute Device Diagnostics 90h Identify Device ECh Flush Cache E7hFormat Track 50h Word Content Description Xxxx Capabilities Command set supported 95-128 0000h Reserved 129-159 Vendor specific 160-255 Initialize Device Parameters 91h Idle 97h,E3hIdle Immediate 95h,E1h Read Buffer E4h Read Long 22hwith retry, 23h without retry Read Multiple Command C4h Read Native Max Address F8h Read Sectors 20hwith retry, 21hwithout retry Seek 7xh Read Verify Sectors 40hwith retry, 41hwithout retryRecalibrate 1xh Set Features EFh Mode Inputs LBANormal outputs BSY Drdy DRQ ERR Description Set Multiple Mode C6h Sleep 99h, E6h Smart B0h Smart disable operation D9hStandby 96h,E2h Smart execute off-line immediate D4h Smart enable/disable attribute autosave D2hSmart enable operations D8h Smart read data D0h Byte Descriptions Value Definition Off-line data collection capability Smart capability Smart read log sector D5hSmart return status DAh Smart save attribution value D3h Standby 96h, E2h Standby Immediate 94h, E0hWrite Buffer E8h Write DMA CAh Write Multiple Command C5h Write Sectors 30hwith retry, 31hwithout retry SpinPoint V40 Product Manual Programming Requirements Reset ResponseError Posting Command Error Register Status Register BBK Power Conditions Sleep modeStandby mode Idle mode Normal mode PIO Data in Commands Protocol Overview PIO Read Aborted Command PIO Data Out CommandsPIO Read Command PIO Write Command PIO Write Aborted CommandBSY=0 DRDY=1 BSY=1 BSY=0 DRQ=1 BSY=1 DRQ=0 Non-Data Commands DMA Data Transfer Commands BSY=1 BSY=0 Aborted DMA Command Initialize DMA Reset DMA StatusBSY=0 BSY=1 Timing Register transfers DIOR-/DIOW Write PIO timing parameters Mode PIO data transfers Addr valid See note T1 t2 DIOR-/DIOW Multiword DMA data transfer DIOR-/DIOW Multiword DMA timing parameters Mode Ultra DMA data transfer Initiating an Ultra DMA data in burst Ultra DMA data burst timing requirements 19Ultra DMA data burst timing requirements Sustained Ultra DMA data in burst 5Sustained Ultra DMA data in burst Host pausing an Ultra DMA data in burst 6Host pausing an Ultra DMA data in burst Device terminating an Ultra DMA data in burst 7Device terminating an Ultra DMA data in burst 100 Host terminating an Ultra DMA data in burst 8Host terminating an Ultra DMA data in burst Initiating an Ultra DMA data out burst 9Initiating an Ultra DMA data out burst 102 Sustained Ultra DMA data out burst 10Sustained Ultra DMA data out burst Device pausing an Ultra DMA data out burst 11Device pausing an Ultra DMA data out burst 104 Host terminating an Ultra DMA data out burst 12Host terminating an Ultra DMA data out burst Device terminating an Ultra DMA data out burst 13Device terminating an Ultra DMA data out burst 106 General Information Maintenance PrecautionsService And Repair