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Silicon Image SSD-D32G(I)-4300 Signal Descriptions Continued, Signal Name, Pins, Type, Dmarq

Models: SSD-D32G(I)-4300

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ELECTRICAL SPECIFICATION				SSD-DXXX(I)-4300 DATA SHEET
		Table 8:	Signal Descriptions (Continued)

	Signal Name	Pin(s)	Type	Description

	DMARQ	21	O	DMA Request. This signal is used for DMA
				transfers between the host and device.

DMARQ is asserted by the device when the device is ready to transfer data to/from the host. The direction of data transfer is controller by -IORD and -IOWR. This signal is used in a handshake manner with - DMACK (i.e., the device waits until the host asserts -DMACK before negating DMARQ, and reasserts DMARQ if there is more data to transfer). The DMARQ/-DMACK handshake is used to provide flow control during the transfer.

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Silicon Image SSD-D32G(I)-4300 manual Signal Descriptions Continued, Signal Name, Pins, Type, Dmarq

Contents

OVERVIEW FEATURESSISECURE DATA SHEETREVISION HISTORYSSD-DXXXI-4300 DATA SHEET REVISION HISTORYDocument No Release DateFeatures TABLE OF CONTENTSPhysical Specifications Product SpecificationsTABLE OF CONTENTS SSD-DXXXI-4300 DATA SHEETCheck Power Mode - 98h, E5h SILICONSYSTEMS PROPRIETARYRelated Documentation Sales and SupportPart Numbering LIST OF FIGURES LIST OF TABLES LIST OF TABLES SSD-DXXXI-4300 DATA SHEETSILICONSYSTEMS PROPRIETARY Table 35 Idle Immediate - 95h, E1hLIST OF TABLES SSD-DXXXI-4300 DATA SHEETSILICONSYSTEMS PROPRIETARY Table 57 Request Sense - 03hFigure 1 Physical Dimensions PHYSICAL SPECIFICATIONSFigure 2 Pin Locations Figure 3 Jumper SettingsTable 1 System Performance PRODUCT SPECIFICATIONSTable 2 System Power Requirements Table 4 Operational Life Span Table 3 ReliabilityService Life SiliconDrive Part#Table 6 Environmental Specifications Table 5 Product Capacity SpecificationsProduct CapacityTable 7 Pin Assignments ELECTRICAL SPECIFICATIONIDE-ATA Ultra DMASignal Name Table 8 Signal DescriptionsPins TypeSignal Name Signal Descriptions ContinuedPins DMA Request. This signal is used for DMASignal Name Signal Descriptions ContinuedPins TypeSignal Name Signal Descriptions ContinuedPins TypeSignal Descriptions Continued Table 9 Absolute Maximum RatingsSignal Name Pins Device Power Supply. The device powerSSD-DXXXI-4300 DATA SHEET Table 10 DC CharacteristicsSymbol ParameterFigure 4 True IDE PIO Mode Read/Write Access Timing Diagram True IDE PIO Mode Read/Write Access TimingSymbol Table 11 True IDE PIO Mode Read/Write Access TimingMode 0 Mode 1 Mode Mode 3 Mode 4 Mode 5 Mode 6 NoteFigure 5 True IDE PIO Multiword DMA Read/Write Access Timing True IDE PIO Multiword DMA Read/Write Access TimingSSD-DXXXI-4300 DATA SHEET Table 12 True IDE PIO Multiword DMA Read/Write Access TimingFigure 6 Initiating a UDMA Data-In Burst Ultra DMA Data Burst Timing RequirementsFigure 7 Sustained UDMA Data-In Burst Figure 8 Host Pausing a UDMA Data-In BurstDSTROBE at device DD150 at device DSTROBE at host DD150 at hostELECTRICAL SPECIFICATION SSD-DXXXI-4300 DATA SHEETFigure 9 Device Terminating a UDMA Data-In Burst SILICONSYSTEMS PROPRIETARYELECTRICAL SPECIFICATION SSD-DXXXI-4300 DATA SHEETFigure 10 Host Terminating a UDMA Data-In Burst SILICONSYSTEMS PROPRIETARYFigure 12 Sustained UDMA Data-Out Burst Figure 11 Initiating a UDMA Data-Out BurstDDMARDY- device HSTROBE at host DD150 at hostFigure 13 Device Pausing a UDMA Data-Out Burst ELECTRICAL SPECIFICATION SSD-DXXXI-4300 DATA SHEETFigure 14 Host Terminating a UDMA Data-Out Burst SILICONSYSTEMS PROPRIETARYSSD-DXXXI-4300 DATA SHEET Table 13 UDMA Data Burst Timing RequirementsELECTRICAL SPECIFICATION Figure 15 Device Terminating a UDMA Data-Out BurstSSD-DXXXI-4300 DATA SHEET Table 13 UDMA Data Burst Timing Requirements ContinuedELECTRICAL SPECIFICATION SILICONSYSTEMS PROPRIETARYELECTRICAL SPECIFICATION SSD-DXXXI-4300 DATA SHEETTable 13 UDMA Data Burst Timing Requirements Continued SILICONSYSTEMS PROPRIETARYATA AND TRUE IDE REGISTER DECODING Table 14 Task File Register SpecificationCS0# CS1#ATA REGISTERS Error RegisterTrack 0 Not Found TKONF. Set when the execute drive OperationOperation Feature RegisterRead/Write ByteSSD-DXXXI-4300 DATA SHEET Table 17 Sector Count RegisterOperation SECTOR COUNT REGISTERSector Number CHS Addressing Table 18 Sector Number RegisterOperation Operation Table 19 Cylinder Low RegisterCylinder Byte CHS AddressingOperation Table 20 Cylinder High RegisterLBA. Selects between CHS 0 and LBA 1 addressing mode Table 21 Drive/Head RegisterOperation Bits5 Drive Write Fault DWF. Always set to Table 22 Status RegisterOperation Bits DescriptionATA Command Code Table 23 Command RegisterOperation Read/WriteOperation Table 24 Alternate Status RegisterBits Description Table 25 Device Control RegisterOperation Bits Description Table 26 Device Address RegisterOperation Table 27 ATA Command Block and Set Description ATA COMMAND BLOCK AND SET DESCRIPTIONTable 28 ATA Command Set Command NameCommand Name Table 28 ATA Command Set ContinuedCommand ClassRegister Table 29 Check Power Mode - 98h, E5hCheck Power Mode - 98h, E5h Register Table 30 Executive Drive Diagnostic - 90hExecutive Drive Diagnostic - 90h Register Table 31 Format Track - 50hFormat Track - 50h Register Table 32 Identify Drive - EChIdentify Drive - ECh Data Default Table 33 Identify Drive - Drive Attribute DataIdentify Drive - Drive Attribute Data WordData Default Table 33 Identify Drive - Drive Attribute Data ContinuedWord BytesTable 33 Identify Drive - Drive Attribute Data Continued Data DefaultWord BytesRegister Table 34 Idle - 97h, E3hIdle - 97h, E3h Register Table 35 Idle Immediate - 95h, E1hIdle Immediate - 95h, E1h Register Table 36 Initialize Drive Parameters - 91hInitialize Drive Parameters - 91h Register Table 37 Recalibrate - 1XhRecalibrate - 1Xh Register Table 38 Read Buffer - E4hRead Buffer - E4h Register Table 39 Read DMA - C8hRead DMA - C8h Register Table 40 Read Multiple - C4hRead Multiple - C4h Register Table 41 Read Sector - 20h, 21hRead Sector - 20h, 21h Register Table 42 Read Long Sectors - 22h, 23hRead Long Sectors - 22h, 23h Register Table 43 Read Verify Sectors - 40h, 41hRead Verify Sectors - 40h, 41h Register Table 44 Seek - 7XhSeek - 7Xh Table 46 Set Features’ Attributes Table 45 Set Features - EFhSet Features - EFh FeatureRegister Table 47 Set Multiple Mode - C6hSet Multiple Mode - C6h Register Table 48 Set Sleep Mode - 99h, E6hSet Sleep Mode - 99h, E6h Register Table 49 Standby - 96h, E2hStandby - 96h, E2h Register Table 50 Standby Immediate - 94h, E0hStandby Immediate - 94h, E0h Register Table 51 Write Buffer - E8hWrite Buffer - E8h Register Table 52 Write DMA - CAhWrite DMA - CAh Register Table 53 Write Multiple - C5hWrite Multiple - C5h Register Table 54 Write Sectors - 30h, 31hWrite Sectors - 30h, 31h Register Table 55 Write Long Sectors - 32h, 33hWrite Long Sectors - 32h, 33h Register Table 56 Erase Sectors - C0hErase Sectors - C0h Table 57 Request Sense - 03h Table 58 Extended Error CodesExtended Error Codes Request Sense - 03hRegister Table 59 Translate Sector - 87hTranslate Sector - 87h Register Table 60 Wear-Level - F5hWear-Level - F5h Register Table 61 Write Multiple w/o Erase - CDhWrite Multiple w/o Erase - CDh Register Table 62 Write Sectors w/o Erase - 38hWrite Sectors w/o Erase - 38h Register Table 63 Write Verify - 3ChWrite Verify - 3Ch PART NUMBERING SALES AND SUPPORTTable 64 Part Numbering Nomenclature Table 65 Part NumbersFigure 16 Sample Label Table 66 Related Documentation RELATED DOCUMENTATIONSiliconDrive Application-Specific Description

Signal Descriptions (Continued)

DMARQ

DMA Request. This signal is used for DMA

transfers between the host and device.