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| Desired Baud Rate | Divisor Used to Generate 16x Clock |
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| 300 | 384 |
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| 600 | 192 |
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| 1200 | 96 |
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| 1800 | 64 |
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| 2400 | 48 |
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| 3600 | 32 |
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| 4800 | 24 |
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| 9600 | 12 |
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| 14400 | 8 |
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| 19200 | 6 |
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| 28800 | 4 |
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| 38400 | 3 |
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| 57600 | 2 |
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| 115200 | 1 |
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Serial Port Divisor Latch
2.6 PARALLEL PORT
(1) Register Address
Port Address | Read/Write | Register |
base + 0 | Write | Output data |
base + 0 | Read | Input data |
base + 1 | Read | Printer status buffer |
base + 2 | Write | Printer control latch |
Registers’ Address
(2) Printer Interface Logic
The parallel port of the
(3) Data Swapper
The system microprocessor can read the contents of the printer’s Data Latch through the Data Swapper by reading the Data Swapper address.
(4) Printer Status Buffer
The system microprocessor can read the printer status by reading the address of the Printer Status Buffer. The bit definitions are described as follows:
7 |
| 6 | 5 | 4 | 3 | 2 |
| 1 |
| 0 | ||||
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| X |
| X |
| X |
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Printer Status Buffer
NOTE: X presents not used.
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