Pin No. |
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| Pin Name | I/O | Function |
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1 |
| DEST | I | Destination control input | |
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2 |
| MPX MODE | I | STEREO/MONO/SAP DETECTION | |
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3 |
| TU AFT | I | Tuner analog AFT input | |
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4 |
| FUNC KEY2 | I | Key input | |
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5 |
| FUNC KEY1 | I | Key input | |
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6 |
| S SENS | I | Tape end sensor input | |
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7 |
| T SENS | I | Tape top sensor input | |
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8 |
| V RF ENV | I | Video playback signal envelope input | |
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9 |
| AF ANV | I | ||
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10 |
| CBC ON | O | Cable box control signal output | |
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11 |
| KKP+ | I | ETR pulese signal input | |
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12 |
| KKP– | I | ETR pulese signal input | |
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13 |
| QVD | O | Quasi VD pulese output | |
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14 |
| REMOCON | I | Remote sires signal input | |
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15 |
| C ROT | O | Head AZ signal output | |
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16 |
| HA SWP | O | SP/EP changed head signal | |
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17 |
| ENV SW | I | SP/EP head output lebel ditaction signal | |
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18 |
| RF SWP | O | VIDEO RF switching pulse output. | |
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19 |
| AF SWP | O | AF switching pulse output. | |
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20 |
| END LED | O | END sensor LED output | |
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21 |
| ANT SEL | O | TV/VTR RF modulator control output | |
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22 |
| AF REC P | O | ||
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23 |
| FE ON | — | NC | |
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24 |
| CAP RVS | O | Capstan reverse control | |
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25 |
| SUR ON | — | NC | |
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26 |
| MODE4 | I | Mechanism section CAM encoder input (data4) | |
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27 |
| MODE3 | I | Mechanism section CAM encoder input (data3) | |
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28 |
| MODE2 | I | Mechanism section CAM encoder input (data2) | |
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29 |
| MODE1 | I | Mechanism section CAM encoder input (data1) | |
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30 |
| REC PRF | I | Erasing protection tab, cassette IN detection input | |
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31 |
| I2C CLK EEP | I/O | HC CLOCK line (EEPROM) | |
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32 |
| I2C DATA EEP | I/O | HC DATA line (EEPROM) | |
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33 |
| CAM | O | Cam motor control signal output | |
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34 |
| RESET | I | System reset input | |
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35 |
| 32kHz (in) | I | Sub clock 32MHz | |
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36 |
| 32kHz (out) | O | Sub clock 32MHz | |
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37 |
| Vcc | I | 5V | |
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38 |
| 4fsc (in) | I | Main clock input | |
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39 |
| 4fsc (out) | O | Main clock output | |
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40 |
| Vss | — | Ground | |
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41 |
| ARC CLK | O | Realityregenarator (ARC) control clock signal | |
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42 |
| ARC DATA | O | Realityregenarator (ARC) control data signal | |
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43 |
| CLK SEL | I | CLOCK seleal “L” Sub clock, “H” main and sub clock. | |
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44 |
| OSC IN | I | OSD clock input | |
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45 |
| OSC OUT | O | OSD clock output | |
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46 |
| NUB | — | Ground | |
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47 |
| LPF | I/O | fsc filter | |
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48 |
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| O | “L” output when SP mode. |
| SP | ||||
49 |
| OSD GND | — | Ground | |
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50 |
| OSD V IN | I | OSD Video signal input. | |
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