Pin No. | Pin Name | I/O |
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45 | BOTM | I | Bottom hold signal input of the light amount signal (RF/ABCD) from RF amp | |||||
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46 | ABCD | I | Light amount signal (ABCD) input from RF amp |
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47 | FE | I | Focus error signal input from RF amp |
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48 | AUX1 | I | Support signal (I3 signal/temperature signal) input terminal (A/D input) Not used | |||||
49 | VC | I | Middle point voltage (+1.2V) input terminal |
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50 | ADIO | O | Monitor output terminal of A/D converter input signal | Not used | ||||
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51 | ADRT | I | A/D converter the upper limit voltage input terminal (fixed at “H” in this set) | |||||
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52 | AVD2 | — | Power supply terminal (for the analog) (+2.3V) |
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53 | AVS2 | — | Ground terminal (for the analog) |
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54 | ADRB | I | A/D converter the lower limit voltage input (fixed at | “L” in this set) | ||||
55 | SE | I | Sled error signal input terminal Not used |
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56 | TE | I | Tracking error signal input from RF amp |
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57 | DCHG | — | Connecting analog power supply of the low impedance (fixed at “H” in this set) | |||||
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58 | APC | I | Error signal input for the laser automatic power control | Not used | ||||
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59 | DSPVDD0 | — | Power supply terminal (for DSP block) (+1.5V) |
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60 | DSPVSS0 | — | Ground terminal (for DSP block) |
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61 | XTSL | I | Input terminal for the frequency set up of the system clock | “L”: 45.1584MHz, | ||||
“H”: 22.5792MHz (fixed at “L” in this set) |
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62 | DIN1 | I | Input terminal of the record system digital audio signal | Not used | ||||
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63 | DOUT | O | Output terminal of the playback system digital audio signal | Not used | ||||
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64 | DAPWMLP | O | D/A converter PWM output terminal | |||||
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65 | DAPWMLN | O | D/A converter PWM output terminal | Not used | ||||
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66 | DAPWMRP | O | D/A converter PWM output terminal | Not used | ||||
67 | DADT | O | Audio data output terminal | Not used |
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68 | ADDT | I | Data input terminal Not used |
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69 | LRCK | O | L/R sampling clock signal (44.1KHz) output terminal |
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70 | XBCK | O | Bit clock signal (2.8224MHz) output terminal | Not used |
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71 | FS256 | O | 11.2896MHz clock signal output terminal Not used |
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72 | MVCI | I | Clock signal input terminal | Not used |
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73 | DSPVDD1 | — | Power supply terminal (for DSP block) (+1.5V) |
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74 | ADFG | I | ADIP duplex FM signal (20.05± 1kHz) input from RF amp |
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75 | F0CNT | O | Filter cut off control signal output terminal | Not used |
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76 | DIFVDD0 | — | Power supply terminal (for DSP I/F) (+1.9V) |
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77 | DIFVSS0 | — | Ground terminal (for DSP I/F) |
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78 | APCREF | O | Reference PWM signal output for the laser automatic power control to RF amp | |||||
79 | LDDR | O | PWM signal output for the laser automatic power control | Not used | ||||
80 | TRDR | O | Tracking servo drive PWM signal output | |||||
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81 | TFDR | O | Tracking servo drive PWM signal output (+) to the motor driver | |||||
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82 | FFDR | O | Focus servo drive PWM signal output (+) to the motor driver | |||||
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83 | FRDR | O | Focus servo drive PWM signal output | |||||
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84 | MCUVDD1 | — | Power supply terminal (for the microcomputer block) (+1.5V) | |||||
85 | FGIN | I | FG signal input terminal for the spindle CAV servo | Not used | ||||
86 | FS4 | O | 176.4kHz clock signal output to the power control |
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87 | SPDU | O | Spindle motor drive control signal output (U) to the motor driver | |||||
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88 | SPVS | O | Spindle servo drive PWM signal output to the motor driver |
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89 | SPDV | O | Spindle motor drive control signal output (V) to the motor driver | |||||
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36