NW-A805/A806/A808/NWZ-A815/A816/A818

MAIN BOARD IC803 XC2C64A-7CPG56C-01 (LEVEL SHIFT)

Pin No.

Pin Name

I/O

 

 

Description

 

 

 

 

 

 

A1 to A4

R3_OUT to

O

Video signal (R) output to the liquid crystal display

R0_OUT

 

 

 

 

 

 

 

 

 

A5

G5_OUT

O

Video signal (G) output to the liquid crystal display

 

 

 

 

 

A6

TDO

O

Data output terminal for JTAG

Not used

 

 

 

 

 

 

A7, A8

G2_OUT,

O

Video signal (G) output to the liquid crystal display

G0_OUT

 

 

 

 

 

 

 

 

 

 

 

A9, A10

B5_OUT,

O

Video signal (B) output to the liquid crystal display

B4_OUT

 

 

 

 

 

 

 

 

 

B1

R4_OUT

O

Video signal (R) output to the liquid crystal display

B10

B3_OUT

O

Video signal (B) output to the liquid crystal display

 

 

 

 

C1

R5_OUT

O

Video signal (R) output to the liquid crystal display

 

 

 

 

 

 

C3

DATA_IN

-

Not used

 

 

 

 

 

 

 

 

C4, C5

G4_OUT,

O

Video signal (G) output to the liquid crystal display

G3_OUT

 

 

 

 

 

 

 

 

 

 

 

C6

VCCIO2

-

Power supply terminal

 

 

C7

GND

-

Ground terminal

 

 

C8

G1_OUT

O

Video signal (G) output to the liquid crystal display

 

 

 

 

C10

B2_OUT

O

Video signal (B) output to the liquid crystal display

 

 

 

 

D1

PXCLK_OUT

O

Clock signal output to the liquid crystal display

 

 

 

 

 

 

D3

VAUX

-

Power supply terminal

 

 

 

 

 

 

 

 

D8, D10

B1_OUT,

O

Video signal (B) output to the liquid crystal display

B0_OUT

 

 

 

 

 

 

 

 

 

E1

VSYNC_OUT

O

Vertical sync signal output to the liquid crystal display

E3

ERR_IN

I

Not used

 

 

 

 

 

 

 

 

E8

DATA_OUT

-

Not used

 

 

 

 

 

 

E10

VSYNC_IN

I

Vertical sync signal input from the system controller

 

 

 

 

F1

HSYNC_OUT

O

Horizontal sync signal output to the liquid crystal display

 

 

 

 

F3

R4_IN

I

Video signal (R) input from the system controller

F8

GND

-

Ground terminal

 

 

F10

HSYNC_IN

I

Horizontal sync signal input from the system controller

G1, G3

R5_IN, R2_IN

I

Video signal (R) input from the system controller

 

 

 

 

 

 

G8

VCC

-

Power supply terminal

 

 

 

 

 

 

G10

B0_IN

I

Video signal (B) input from the system controller

 

 

 

 

H1, H3

R3_IN, R0_IN

I

Video signal (R) input from the system controller

H4

GND

-

Ground terminal

 

 

H5

PXCLK_IN

I

Clock signal input from the system controller

H6

VCCIO1

-

Power supply terminal

 

 

 

 

 

 

 

 

H7, H8,

B4_IN, B2_IN,

I

Video signal (B) input from the system controller

H10

B1_IN

 

 

 

 

 

 

 

 

J1

R1_IN

I

Video signal (R) input from the system controller

 

 

 

 

 

J10

TDI

I

Data input terminal for JTAG

Not used

K1 to K6

G5_IN to G0_IN

I

Video signal (G) input from the system controller

K7, K8

B5_IN, B3_IN

I

Video signal (B) input from the system controller

K9

TMS

I

MS signal input terminal for JTAG

Not used

 

 

 

 

 

K10

TCK

I

Clock signal input terminal for JTAG

Not used

 

 

 

 

 

 

40

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Image 40
Sony NW-A808 B5OUT, VCCIO2, Vaux, B1OUT, Vsyncout, Errin, Vsyncin, Hsyncout, R4IN, Hsyncin, Vcc, B0IN, Pxclkin, VCCIO1