SOYO SY-7IWA-F Latency Time, Sdram Cycle, Time Tras/Trc, To-CAS Delay System Bios, Cacheable

BIOS Setup Utility		SY-7IWA-F
3-4.1 CHIPSET FEATURES SETUP
CHIPSET	Setting	Description	Note
FEATURES
SDRAM CAS
	2	Use the default setting
Latency Time	3		Default
SDRAM Cycle
	5/7	Use the default setting
Time Tras/Trc	6/8		Default
SDRAM RAS-
	3	Use the default setting	Default
to-CAS Delay	2
System BIOS	Disabled
Cacheable	Enabled	The ROM area F0000H-FFFFFH is	Default
		cacheable.

Video BIOS Cacheable

Disabled

Enabled The video BIOS C0000H-C7FFFH is Default cacheable.

Memory Hole At 15M-16M

Delayed Transaction

Disabled		Default
Enabled	Some interface cards will map their
	ROM address to this area. If this
	occurs, select [Enabled] in this field.
Disabled
Enabled	Use the default setting	Default

Spread Spectrum

Disabled Default

Enabled When using Spread Spectrum Modulated 1.5% or 6% for FCC or DOC testing.

Local Memory Frequency

100MHz

133MHz

This item allows the user to set the Default frequency the memory runs at. If this item

is set to 100MHz, make sure to use PC- 100 compliant DIMM modules. If this item is set to 133Mhz, PC-133 compliant modules have to be used. Setting this item to a higher frequency than is supported by your SDRAM DIMM modules may lead to system crashes.

Note: Only the 810E chipset supports this Feature.

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