Class-D Output Tab | Texas Instruments TLV320AIC3107EVM-K manual

TLV320AIC3107EVM Software

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4.13 Class-D Output Tab

Figure 29. Class-D Output Tab

The integrated Class-D speaker amplifier can drive one watt into an 8-Ωload. Figure 29 shows the controls for the Class-D amplifier. The input to the Class-D amplifier is the same signal available at the left lineout LEFT_LOP pin. The Class-D amplifier must be enabled first and then the gain control (0 dB to +18 dB) can be used. Note that many other gains are available in the signal path leading up to the Class-D amplifier.

Also available is the an analog bypass switch to allow a signal up to 3.3 V to be input at SWINP and SWINM and output at SWOUTP and SWOUTM. When the bypass switch is enabled (Register 76, D1), it is also recommended to enable the Bypass Switch Bootstrap Clock (Register 76, D0).

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TLV320AIC3107EVM-K

SLAU261–November 2008

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Image 30

Texas Instruments TLV320AIC3107EVM-K quick start Class-D Output Tab

Contents

EVM-Compatible Device Data Sheets TLV320AIC3107EVM-K USB-MODEVM SW2 Settings EVM Overview FeaturesTLV320AIC3107EVM-K Block Diagram Introduction TLV320AIC3107EVM-K Block Diagram USB-MODEVM Interface Board 2 TLV320AIC3107EVM Jumpers and Switches Default Configuration and ConnectionsUSB-MODEVM SW2 Settings List of Stand-alone Jumpers Power Connections TLV320AIC3107EVM-K Setup and Installation Software InstallationEVM Connections Quick Start USB-MODEM Configurations TLV320AIC3107EVM SoftwareQuick Start Tabs Quick Start Preset Configurations Quick Start Preset Configurations Tab Main Software Screen With Indicators and Functions Main Software Screen Detailed TLV320AIC3107 Block Diagram Audio Input/ADC Tab Audio Input/ADC Tab Bypass Paths Tab Bypass Paths Tab Audio Interface Tab Audio Interface Tab Configuring the Codec Clocks and Fsref Calculation Clocks Tab Setting ADC and DAC Sampling Rates Use Without PLLUse With PLL GPIO1 Tab GPIO1 Tab AGC Tab AGC Tab Left AGC Settings Filters Tab Filters Tab ADC Filters High-Pass FilterDigital Effects Filter ADC DAC Filters De-emphasis FiltersDAC Digital Effects Filter Digital Effects Filters Shelf Filters EQ Filters Analog Simulation Filters Preset Filters User Filters 10 DAC/Line Outputs Tab 3.6 3D Effect DAC Controls Line Output Mixers HP Output Stage Configuration Tab Output Stage Configuration Tab High Power Outputs Tab HP Outputs Tab Class-D Output Tab Class-D Output Tab Command Line Interface Tab Command Line Interface Tab File Menu Analog Input/Output Connectors Appendix a EVM Connector DescriptionsAnalog Interface Connectors Table A-1. Analog Input/Output Connectors Block a and Block B Digital Interface Connectors J16 and J17 Table A-2. Block a and Block B Digital Interface Pinout Power Supply Connector Pin Header, J15 Table A-3. Power Supply Pinout Appendix B TLV320AIC3107EVM Schematic TP4 Avdd DAC Appendix B Figure C-1. Assembly layer Appendix C TLV320AIC3107EVM Layout Views Figure C-3. Layer Figure C-5. Bottom Layer Appendix D TLV320AIC3107EVM Bill of Materials Table D-1. TLV320AIC3107EVM Bill of Materials Not Appendix E USB-MODEVM Schematic Ti a HIGH-PERFORMANCE Analog Division Appendix F USB-MODEVM Bill of Materials Table F-1. USB-MODEVM Bill of Materials Designators Description Manufacturer USB-MODEVM Protocol Table G-2. Data Packet ConfigurationAppendix G USB-MODEVM Protocol Table G-1. USB Control Endpoint Hidsetreport Request 0x12 0xA0 0x02 0x05 0xAA 0x55 0x01 0xA0 0x02 0x05 Gpio Capability Table G-3. Gpio Pin Assignments Writing Scripts Writing Scripts Evaluation BOARD/KIT Important Notice FCC Warning Important Notice