600X CompactFlash Card | Transcend Information TS16GCF600 guide

TS8G~16GCF600				600X CompactFlash Card

Signal Description

	Signal Name	Dir.	Pin	Description
A10 – A00		I	8,10,11,12,	These address lines along with the -REG signal are used to select the following:
(PC Card Memory Mode)			14,15,16,17,	The I/O port address registers within the CompactFlash Storage Card , the
			18,19,20	memory mapped port address registers within the CompactFlash Storage Card,
				a byte in the card's information structure and its configuration control and status
				registers.
A10 – A00				This signal is the same as the PC Card Memory Mode signal.
(PC Card I/O Mode)
A02 - A00		I	18,19,20	In True IDE Mode, only A[02:00] are used to select the one of eight registers
(True IDE Mode)				in the Task File, the remaining address lines should be grounded by the
				host.

BVD1		I/O	46	This signal is asserted high, as BVD1 is not supported.
(PC Card Memory Mode)
-STSCHG				This signal is asserted low to alert the host to changes in the READY and Write
(PC Card I/O Mode)				Protect states, while the I/O interface is configured. Its use is controlled by the
Status Changed				Card Config and Status Register.
-PDIAG				In the True IDE Mode, this input / output is the Pass Diagnostic signal in the
(True IDE Mode)				Master / Slave handshake protocol.

BVD2		I/O	45	This signal is asserted high, as BVD2 is not supported.
(PC Card Memory Mode)
-SPKR				This line is the Binary Audio output from the card. If the Card does not support
(PC Card I/O Mode)				the Binary Audio function, this line should be held negated.
-DASP				In the True IDE Mode, this input/output is the Disk Active/Slave Present signal in
(True IDE Mode)				the Master/Slave handshake protocol.

-CD1, -CD2		O	26,25	These Card Detect pins are connected to ground on the CompactFlash Storage
(PC Card Memory Mode)				Card. They are used by the host to determine that the CompactFlash Storage
				Card is fully inserted into its socket.
-CD1, -CD2				This signal is the same for all modes.
(PC Card I/O Mode)
-CD1, -CD2				This signal is the same for all modes.
(True IDE Mode)

Transcend Information Inc.

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V1.0

Image 9

Transcend Information TS16GCF600, TS8GCF600 600X CompactFlash Card, Signal Description, Signal Name Dir Pin Description

Contents

Placement Features Power Consumption DimensionsDescription Transcend Block Diagram TS8G~16GCF600 Pin Assignments and Pin Type PC Card Memory Mode PC Card I/O Mode True IDE Mode4 PC Card Memory Mode PC Card I/O Mode Input Characteristics Input Leakage CurrentOutput Drive Type Output Drive Characteristics Output Drive CharacteristicsSymbol Conditions Signal Description Signal Name Dir Pin Description600X CompactFlash Card GND Csel Hstrobe Hdmardy Signal Name DirPin Description Reset REGDmack Iordy DdmardyDstrobe Electrical Specification Symbol Input Power Input Characteristics for Udma modeOutput Drive Characteristics for Udma mode Parameter Symbol Signal Card Host Signal Interface 150 a high state per socket Pull-up pin 45 BVD2 to avoid sensing their batteries as Low Ultra DMA Electrical Requirements Series termination required for Ultra DMA operationTable Typical Series Termination for Ultra DMA Ultra DMA Mode Cabling Requirement Speed Version 300 ns Symbol Ieee Symbol Min ns Max ns Attribute Memory Read Timing Specification Speed Version 250 ns Symbol Min ns Max ns Table Configuration Register Attribute Memory Write Timing Cycle Time Mode 250 ns 120 ns 100 ns 80 ns Symbol Common Memory Read Timing SpecificationMin Max Symbol Ieee Cycle Time Mode 250 ns 120 ns 100 ns 80 ns Common Memory Write Timing Specification Data Delay after Hioe TdHIOE TlGLQV Input Read Timing SpecificationData Delay from Wait Rising2 TdIORDY TWTHQV Wait Width Time2 TwIORDY TWTLWTH Cycle Time Mode 255 ns 120 ns 100 ns 80 ns Output Write Timing Specification True IDE PIO Mode Read/Write Timing Specification ModeT6Z TS8G~16GCF600 True IDE Multiword DMA Mode Read/Write Timing Specification TS8G~16GCF600 PC Card MEM PC Card IO Mode True IDE Ultra DMA Mode Read/Write Timing SpecificationMode Udma True IDE Mode Udma TS8G~16GCF600 Name Name Comment Min Max Name Mode Mode414.7 72.9 50.9 Min Max Name Multiple Function CompactFlash Storage Cards Card ConfigurationREG Selected Space Dmarq Dmack Stop Hioe Dmardy StrobeDMA Inpack REG Hiow Wait Hioe CMD Attribute Memory Function Table Attribute Memory FunctionDMA CMD REG Configuration Option Register Base + 00h in Attribute Memory TS8G~16GCF600 Pin Replacement Register Base + 04h in Attribute Memory Socket and Copy Register Base + 06h in Attribute Memory Transfer Function Table Pcmcia Mode I/O FunctionDMA CMD REG -CE2 Table PC Card I/O Mode Udma Function Dmarq Dmack Stop Hioe Wait DMA A10Inpack REG Hiow Wait Hioe CMD A00 Table Common Memory Function Common Memory Transfer FunctionDMA REG CE2 CE1 D15-D8 True IDE Mode I/O Transfer Function Metaformat Overview CF-ATA Drive Register Set Definition and Protocol Table Primary and Secondary I/O Decoding Primary and Secondary Address Configurations Table Contiguous I/O Decoding Contiguous I/O Mapped Addressing Memory Mapped Addressing True IDE Mode Addressing Data Register Address 1F0h170hOffset 0,8,9 CF-ATA Registers Sector Count Register Address 1F2h172h Offset Feature Register Address 1F1h171h Offset 1, 0Dh Write OnlySector Number LBA 7-0 Register Address 1F3h173h Offset Cylinder Low LBA 15-8 Register Address 1F4h174h Offset TS8G~16GCF600 Device Control Register Address 3F6h376h Offset Eh Card Drive Address Register Address 3F7h377h Offset Fh Command Code CF-ATA Command Set Definitions Execute Drive Diagnostic 90h Check Power Mode 98h or E5hBit Command Cyl High Cyl Low Sec Num Sec Cnt Feature Erase Sectors C0h Transcend Information IncFlush Cache E7h Format Track 50h Word Default Total Data Field Type Information Drive Cyl High Cyl Low Sec Num Sec Cnt FeatureIdentify Device Ech Bytes Command sets supported PIO data transfer cycle timing modeXXXXh Command sets enabled Ultra DMA Mode Supported and Selected CF Advanced True IDE Timing Mode Capability and Setting Word 0 General ConfigurationCF Advanced PC Card I/O and Memory Timing Mode Capability Key management schemes supported Word 3 Default Number of Heads Word 1 Default Number of CylindersWord 6 Default Number of Sectors per Track Word 49 Capabilities Bit 13 Standby Timer Total Sectors Addressable in LBA Mode Multiple Sector SettingCurrent Number of Cylinders, Heads, Sectors/Track Current Capacity Words 82-84 Features/command sets supported Recommended Multiword DMA transfer cycle timeWord 68 Minimum PIO transfer cycle time with Iordy Word 88 Ultra DMA Modes Supported and Selected Words 85-87 Features/command sets enabled Word 91 Advanced power management level value Word 89 Time required for Security erase unit completionWord 128 Security Status Bit 8 Security Level Value Maximum PIO mode timing selected Word 160 Power Requirement DescriptionValue Maximum Multiword DMA timing mode supported Additional Requirements for CF Advanced Timing Modes Value Maximum Pcmcia IO timing mode Supported Value Current PIO timing mode selectedValue Maximum Memory timing mode Supported Current Multiword DMA timing mode selected Value Maximum PC Card I/O Udma timing mode Supported Value Maximum PC Card Memory Udma timing mode SupportedValue PC Card Memory or I/O Udma timing mode Selected Idle Immediate 95h or E1h Idle 97h or E3hInitialize Drive Parameters 91h Drive Cyl High Cyl Low Sec Num Sec Cnt NOP 00h Read Buffer E4hRead DMA C8h Read Long Sector 22h or 23h TS8G~16GCF600 Request Sense 03h Seek 7Xh Set Features EFh Feature Supported TS8G~16GCF600 Translate Sector Information Standby Immediate 94h or E0h Translate Sector 87h Wear Level F5h Write Buffer E8h Write DMA CAh TS8G~16GCF600 TS8G~16GCF600 Error Posting BBK UNC Idnf Abrt Amnf Drdy DWF DSC Corr ERRNOP S. Table Capacity Transcend Product Capacity CompactFlash Card Ordering Information