Xilinx XAPP721 manual Write Data Transmitted Using Oserdes

Write Datapath

R

Write

Data

Words

0-3

D1
		DQ
D2
D3
D4
		OSERDES
CLKDIV	CLK	CLKdiv_90
		CLKfast_90
IOB		ChipSyncTM Circuit
		X721_03_080305

Figure 3: Write Data Transmitted Using OSERDES

CLKfast_0

CLKfast_90

Clock Forwarded to Memory Device

Command WRITE IDLE

Control (CS_L)

Strobe (DQS)

Data (DQ), OSERDES Output D0 D1 D2 D3

X721_04_120505

Figure 4: Write Strobe (DQS) and Data (DQ) Timing for a Write Latency of Four

March 2006 Memory Interfaces Solution Guide 57