Write Datapath
R
Figure 5: Write DQ Generation with a Write Latency of 4 and a Burst Length of4
Figure 6: Write DQS Generation for a Write Latency of 4 and a Burst Length of 4
CLKdiv_0
CLKdiv_90
CLKfast_90
Clock Forwarded
to Memory Device
Command WRITE IDLE
D0 D1 D2 D3
Control (CS_L)
Strobe (DQS)
ctrl_WrEn
ctrl_wr_disable
OSERDES Inputs D1, D2, D3, D4
OSERDES Inputs T1, T2, T3, T4
User Interface Data
FIFO Out
Data (DQ), OSERDES Output
1,1,0,0
X,X,D0,D1
0,0,1,1
D2,D3,X,X
D0,D1,D2,D3
X721_05_080205
CLKdiv_0
CLKdiv_180
CLKfast_0
Clock Forwarded
to Memory Device
Command WRITE IDLE
Control (CS_L)
Strobe (DQS), OSERDES Output
ctrl_WrEn
ctrl_wr_disable
OSERDES Inputs D1, D2, D3, D4
OSERDES Inputs T1, T2, T3, T4 1, 1, 1, 0
0, 0, 0, 0
0, 0, 0, 0
0, 1, 0, 1
0, 1, 1, 1
0, 0, 0 ,0
X721_06_080205
60 Memory Interfaces Solution Guide March 2006