Intel 536EX manual Intel Confidential, AT Command Summary Tables, connect state, transmits

Page 20
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AT Command Summary Tables

Table 6. V.44/V.42/V.42 bis MNP Command Summary (Continued)

Note

 

Command

Function

 

Default

Range

Reported

 

 

by &Vn

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

connect state, transmits

Enters command mode,

 

 

 

 

 

 

no break sent

 

 

 

 

 

 

 

 

 

 

 

 

\K2

 

 

 

 

 

 

 

command state, transmits

Nondestructive/expedited

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

connect state, receives

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

connect state, transmits

 

 

 

 

 

 

 

 

 

 

 

 

 

 

\K3

command state, transmits

Nondestructive/expedited

 

 

 

 

 

 

 

 

 

 

 

 

 

 

connect state, receives

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

connect state, transmits

Enters command mode,

 

 

 

 

 

 

no break sent

 

 

 

 

 

 

 

 

 

 

 

 

\K4

 

 

 

 

 

 

 

command state, transmits

Nondestructive/

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

connect state, receives

nonexpedited

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

connect state, transmits

 

 

 

 

 

 

 

 

Nondestructive/

 

 

 

 

 

\K5

command state, transmits

 

 

 

 

 

nonexpedited

 

 

 

 

 

 

 

 

 

 

 

 

 

connect state, receives

 

 

 

 

 

 

 

 

 

 

 

 

*

 

\T0

Disables inactivity timer

 

0

0–90

yes

 

 

 

 

 

 

 

*

 

\Xn

Set XON/XOFF pass-through

0

0, 1

yes

 

 

 

 

 

 

 

 

 

\X0

Processes flow control characters

 

 

 

 

 

 

 

 

 

 

 

 

\X1

Processes flow control characters and passes to local

 

 

 

 

 

or remote

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

*

 

-Jn

Set V.42 detect phase

 

1

0, 1

yes

 

 

 

 

 

 

 

 

 

-J0

Disables the V.42 detect phase

 

 

 

 

 

 

 

 

 

 

 

 

-J1

Enables the V.42 detect phase

 

 

 

 

 

 

 

 

 

 

*

 

“Hn

V.42 bis compression control

3

0–3

yes

 

 

 

 

 

 

 

 

 

 

“H0

Disables V.42 bis

 

 

 

 

 

 

 

 

 

 

 

 

 

“H1

Enables V.42 bis only when transmitting data

 

 

 

 

 

 

 

 

 

 

 

 

“H2

Enables V.42 bis only when receiving data

 

 

 

 

 

 

 

 

 

 

 

 

“H3

Enables V.42 bis for both transmitting and receiving

 

 

 

 

 

data

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

“On

V.42 bis string length

 

32

6–250

no

 

 

 

 

 

 

 

 

 

+DR=m

Controls data compression reporting

0

0, 1

no

 

 

 

 

 

 

 

 

 

 

m=0

Disabled

 

 

 

 

 

 

 

 

 

 

 

 

 

 

m=1

Enabled

 

 

 

 

 

 

 

 

 

 

 

 

*

 

+DS=m

Controls V.42 bis data compression

3, 0,

See note

yes

 

2048, 6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

*

Value saved in NVRAM.

 

 

 

 

 

 

 

 

 

 

 

 

20

536EX Chipset Developer’s Manual

Intel Confidential

Image 20
Contents January 536EX ChipsetDeveloper’s Manual Intel Confidential 536EX Chipset Developer’s ManualContents ContentsFigures Tables Revision History DateRevision DescriptionIntroduction 1.1Controllerless Modem Driver OverviewFigure 1. WDM Driver Block Diagram 1.1.2Windows 95 and WindowsUser applications Kernel - ring0Figure 2. VxD Mini Port Driver Block Diagram 1.2V.90/V.92 and V.34 Data Modes1.3Modem Connection Overview Table 3. DCE-to-ISPData Rates for V.90 Mode Table 1. DTE-to-DCEData Rates for Each ModeTable 2. DCE-to-DCEData Rates for Each Mode 1.4.1Sending Commands Table 4. DTE-ModemData Rate Response Codes1.4.2AT Escape Sequences 1.4.3Dial ModifierTable 5. Data Mode Command Summary AT Command Summary TablesAT Command Summary Tables Table 5. Data Mode Command Summary Continued Result code type AT Command Summary Tables Generate data mode calling tone Table 6. V.44/V.42/V.42 bis MNP Command Summary AT Command Summary Tables Table 7. Fax Identity Command Summary Table 8. Fax Class 1 Command SummaryTable 9. IS-101Voice Command Summary Table 10. Voice DTE→DCE Character PairsTable 10. Voice DTE→DCE Character Pairs Continued Table 11. Voice DTE←DCE Character PairsTable 13. S-RegisterSummary Table 11. Voice DTE←DCE Character Pairs ContinuedTable 12. Dial Modifiers Table 13. S-RegisterSummary Continued Data Mode AT COMMANDS Data Mode AT COMMANDSTable 14. Data Reporting Wn Mapping Figure 3. Example of a Remote ConnectionATW0 •ATW2Examples +FMFR?, +FMDL?, +FREV? 3.8Modem-to-ModemConnection Data Rates 3.6Online Command Mode Escape Codes, On3.7Hanging Up Hn, S10, Zn, &D2 536EX Chipset Developer’s Manual +PMH=0 +PCW=0+VCID=1 +++AT536EX Chipset Developer’s Manual hook to connect the call. Now you can answer the phone and talk. After completing your voice conversation, the modem will issue another +PMHF and ATO command to initiate a Quick Connect. If the server rejects the request to go on hold, the user can stay on line ATO command issued or disconnect from his initial data connection ATH command issued Table 16. Supported Modulation Types 3.9Diagnostic Testing S18, &Tn 3.9.1Local Analog Loopback AT&T13.9.2Local Analog Loopback With Self-TestAT&T8 LOCAL MODEMFigure 6. Local Analog Loopback Test Local Modem or Test Modem3.10.1Time-IndependentEscape Sequence Licensing Requirements for Hayes Escape Sequencechar1 = char2 = char3 = escape character S2 <char1><char2><char3><AT command><contents of S3>Format Table 18. Data Mode Command Descriptions 3.10.2Hayes* Escape Sequence536EX Chipset Developer’s Manual Sn=x 536EX Chipset Developer’s Manual Data Mode AT COMMANDSIntel Confidential Data Mode AT COMMANDS AT&V0 536EX Chipset Developer’s Manual Definition Command DefaultIndication 1, 0, 536EX Chipset Developer’s Manual 1, 1, +ESR+ETBM +GMR +GSN+IFC +ILRR=mData Mode AT COMMANDS <carrier> Description+MS=m see ‘m’+PHSW= +PMHF<value> +PMHR536EX Chipset Developer’s Manual Table 19. Operating Modes Error Correction and Data Compression4Error Correction and Data Compression Table 20. Resulting +ES Connection Types NOTES536EX Chipset Developer’s Manual Error Correction and Data CompressionIntel Confidential 536EX Chipset Developer’s Manual +DR=m direction+DS=m <max string>3768 +EFCS=m+ER=m +ES=m Fax Class 1 AT Commands 5.1Fax Identity Commands5.2Fax Class 1 Commands Fax Class 1 AT CommandsTable 23. <mod> Selection Table Figure 8. T.30 HDLC Frame Format Table 24. Fax Mode Command Descriptions Table 24. Fax Mode Command Descriptions Continued +FRH=mRefer to Table 23 on page shown in Table 23 on page+FTH=m IS-101Voice Mode AT Commands IS-101Voice Mode AT Commands6.2Relay Control Table 25. Voice Mode Command Descriptions6.1DTMF Detection Reporting +FLO=m m = <deassert>, <assert>m=<enable>, <report> +VDR=mm = <mask> +VEM=mIntel Confidential +VIP Preassigned Voice I/O Labels +VLS=mVoice I/O Primitive Codes Relay/Playback Control: cont+VSD=m +VRXm = <sds>, <sdi> Transmission: Range: m= <cml>, <vsr>, <scs>, <sel>+VSM=m Compression Method Selection: cont +VSP=mfactory default is ‘0’ +VTS=m noneCommand DefaultDescription DTMF and Tone Generation: contS-Registers S-RegistersTable 26. S-RegisterCommand Descriptions 536EX Chipset Developer’s Manual Intel ConfidentialS-Registers 536EX Chipset Developer’s Manual Intel ConfidentialS-Registers 536EX Chipset Developer’s Manual Intel ConfidentialS-Registers 536EX Chipset Developer’s Manual Table 27. Caller ID Tags for Formatted Reporting Caller IDCaller ID RING DATE = TIME = NMBR = NAME = DOE JOHN MESG = RING RING<DLE> R NMBR =Parallel Host Interface 16C450/16C550A UARTParallel Host Interface 16C450/16C550A UART Figure 11. UART Emulation in Intelsdb.VxDUART Transmitter Flow Diagram UART Receiver Flow DiagramREGISTER BIT NUMBERADDRESS NAME9.2.1Scratch Register SCR 9.2.2Modem Status Register MSRFigure 14. Scratch Register SCR Figure 15. Modem Status Register MSR9.2.3Line Status Register LSR Figure 16. Line Status Register LSR9.2.4Modem Control Register MCR 9.2.5Line Control Register LCRFigure 17. Modem Control Register MCR Figure 18. Line Control Register LCRFigure 19. FIFO Control Register FCR 9.2.6FIFO Control Register FCRRegister Table 28. Interrupt Control Functions 9.2.7Interrupt Identity Register IIRFigure 20. Interrupt Identity Register IIR 9.2.8Interrupt Enable Register IER Figure 21. Interrupt Enable Register IER9.2.9Transmitter Holding Register THR Figure 22. Transmitter Holding Register THR9.2.10Receiver Buffer Register RBR 9.2.11Divisor Latch Registers DLM and DLLFigure 23. Receiver Buffer Register RBR Figure 24. Divisor Latch Registers DLM and DLL9.3.2FIFO Polled Mode Operation 9.316C550A UART FIFO Operation9.3.1FIFO Interrupt Mode Operation 536EX Chipset Developer’s Manual Intel ConfidentialParallel Host Interface 16C450/16C550A UART