Intel manual Intel Confidential, Data Mode AT COMMANDS, 1, 0, 536EX Chipset Developer’s Manual

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1, 0, 30

Data Mode AT COMMANDS

Table 18. Data Mode Command Descriptions (Continued)

Command

Default

 

Description

 

 

 

 

 

Break Handling: Controls break handling in error control operation. It accepts three numeric

 

 

subparameters:

 

 

Syntax:

 

 

 

+EB = <break selection>, <timed>, <default length>

 

 

<break selection> specifies the type of break to be signaled to the remote DCE upon detecting one from

 

 

the local DTE.

 

 

0

Ignore Break (do not signal to remote DCE)

 

 

1

Non-expedited, non-destructive

 

 

2

Expedited, non-destructive

+EB

1, 0, 30

3

Expedited and destructive

 

 

<timed> specifies if the break signal to be signaled to the remote DCE is timed or not.

 

 

0

Sent without a break signal length

 

 

1

Sent with break signal length

 

 

<default length> specifies the amount of time in tens of milliseconds that a break should be signaled to

 

 

the local DTE when an indication of a break is received from the remote DCE without explicitly indicated.

 

 

0

Do not deliver received break to DTE

 

 

1

Default break length 0.01 to 2.54 seconds. Used for default to signal DTE when break

 

 

 

received from the remote DCE without break length

 

 

Controls the use of breaks in V.42.

 

 

 

 

NOTE: An asterisk (*) denotes the factory-default setting.

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536EX Chipset Developer’s Manual

Intel Confidential

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Contents 536EX Chipset Developer’s ManualJanuary Intel Confidential 536EX Chipset Developer’s ManualContents ContentsFigures Tables Revision History DateRevision DescriptionIntroduction 1.1Controllerless Modem Driver OverviewFigure 1. WDM Driver Block Diagram 1.1.2Windows 95 and WindowsUser applications Kernel - ring0Figure 2. VxD Mini Port Driver Block Diagram 1.2V.90/V.92 and V.34 Data Modes1.3Modem Connection Overview Table 1. DTE-to-DCEData Rates for Each Mode Table 2. DCE-to-DCEData Rates for Each ModeTable 3. DCE-to-ISPData Rates for V.90 Mode 1.4.1Sending Commands Table 4. DTE-ModemData Rate Response Codes1.4.2AT Escape Sequences 1.4.3Dial ModifierAT Command Summary Tables AT Command Summary TablesTable 5. Data Mode Command Summary Table 5. Data Mode Command Summary Continued Result code type AT Command Summary Tables Generate data mode calling tone Table 6. V.44/V.42/V.42 bis MNP Command Summary AT Command Summary Tables Table 7. Fax Identity Command Summary Table 8. Fax Class 1 Command SummaryTable 9. IS-101Voice Command Summary Table 10. Voice DTE→DCE Character PairsTable 10. Voice DTE→DCE Character Pairs Continued Table 11. Voice DTE←DCE Character PairsTable 11. Voice DTE←DCE Character Pairs Continued Table 12. Dial ModifiersTable 13. S-RegisterSummary Table 13. S-RegisterSummary Continued Data Mode AT COMMANDS Data Mode AT COMMANDSTable 14. Data Reporting Wn Mapping Figure 3. Example of a Remote ConnectionATW0 •ATW2Data Mode AT COMMANDS +FMFR?, +FMDL?, +FREV? 3.6Online Command Mode Escape Codes, On 3.7Hanging Up Hn, S10, Zn, &D23.8Modem-to-ModemConnection Data Rates Data Mode AT COMMANDS +PMH=0 +PCW=0+VCID=1 +++ATData Mode AT COMMANDS hook to connect the call. Now you can answer the phone and talk. After completing your voice conversation, the modem will issue another +PMHF and ATO command to initiate a Quick Connect. If the server rejects the request to go on hold, the user can stay on line ATO command issued or disconnect from his initial data connection ATH command issued Table 16. Supported Modulation Types 3.9Diagnostic Testing S18, &Tn 3.9.1Local Analog Loopback AT&T13.9.2Local Analog Loopback With Self-TestAT&T8 LOCAL MODEMFigure 6. Local Analog Loopback Test Local Modem or Test Modem3.10.1Time-IndependentEscape Sequence Licensing Requirements for Hayes Escape Sequence<char1><char2><char3><AT command><contents of S3> Formatchar1 = char2 = char3 = escape character S2 Table 18. Data Mode Command Descriptions 3.10.2Hayes* Escape SequenceData Mode AT COMMANDS Sn=x Data Mode AT COMMANDS Intel Confidential536EX Chipset Developer’s Manual Data Mode AT COMMANDS AT&V0 Data Mode AT COMMANDS Command Default IndicationDefinition 1, 0, Data Mode AT COMMANDS +ESR +ETBM1, 1, +GMR +GSN+IFC +ILRR=mData Mode AT COMMANDS <carrier> Description+MS=m see ‘m’+PHSW= +PMHF<value> +PMHRData Mode AT COMMANDS Error Correction and Data Compression4 Error Correction and Data CompressionTable 19. Operating Modes Table 20. Resulting +ES Connection Types NOTESError Correction and Data Compression Intel Confidential536EX Chipset Developer’s Manual Error Correction and Data Compression +DR=m direction+DS=m <max string>3768 +EFCS=m+ER=m +ES=m Fax Class 1 AT Commands 5.1Fax Identity Commands5.2Fax Class 1 Commands Fax Class 1 AT CommandsTable 23. <mod> Selection Table Figure 8. T.30 HDLC Frame Format Table 24. Fax Mode Command Descriptions Table 24. Fax Mode Command Descriptions Continued +FRH=mRefer to Table 23 on page shown in Table 23 on page+FTH=m IS-101Voice Mode AT Commands IS-101Voice Mode AT CommandsTable 25. Voice Mode Command Descriptions 6.1DTMF Detection Reporting6.2Relay Control +FLO=m m = <deassert>, <assert>m=<enable>, <report> +VDR=mm = <mask> +VEM=mIntel Confidential +VIP Preassigned Voice I/O Labels +VLS=mVoice I/O Primitive Codes Relay/Playback Control: cont+VRX m = <sds>, <sdi>+VSD=m m= <cml>, <vsr>, <scs>, <sel> +VSM=mTransmission: Range: Compression Method Selection: cont +VSP=mfactory default is ‘0’ +VTS=m noneCommand DefaultDescription DTMF and Tone Generation: contS-Registers Table 26. S-RegisterCommand DescriptionsS-Registers Intel Confidential S-Registers536EX Chipset Developer’s Manual Intel Confidential S-Registers536EX Chipset Developer’s Manual Intel Confidential S-Registers536EX Chipset Developer’s Manual Intel Confidential Caller ID Caller IDTable 27. Caller ID Tags for Formatted Reporting RING DATE = TIME = NMBR = NAME = DOE JOHN MESG = RING RING<DLE> R NMBR =Parallel Host Interface 16C450/16C550A UARTParallel Host Interface 16C450/16C550A UART Figure 11. UART Emulation in Intelsdb.VxDUART Transmitter Flow Diagram UART Receiver Flow DiagramREGISTER BIT NUMBERADDRESS NAME9.2.1Scratch Register SCR 9.2.2Modem Status Register MSRFigure 14. Scratch Register SCR Figure 15. Modem Status Register MSR9.2.3Line Status Register LSR Figure 16. Line Status Register LSR9.2.4Modem Control Register MCR 9.2.5Line Control Register LCRFigure 17. Modem Control Register MCR Figure 18. Line Control Register LCR9.2.6FIFO Control Register FCR RegisterFigure 19. FIFO Control Register FCR 9.2.7Interrupt Identity Register IIR Figure 20. Interrupt Identity Register IIRTable 28. Interrupt Control Functions 9.2.8Interrupt Enable Register IER Figure 21. Interrupt Enable Register IER9.2.9Transmitter Holding Register THR Figure 22. Transmitter Holding Register THR9.2.10Receiver Buffer Register RBR 9.2.11Divisor Latch Registers DLM and DLLFigure 23. Receiver Buffer Register RBR Figure 24. Divisor Latch Registers DLM and DLL9.316C550A UART FIFO Operation 9.3.1FIFO Interrupt Mode Operation9.3.2FIFO Polled Mode Operation Intel Confidential Parallel Host Interface 16C450/16C550A UART536EX Chipset Developer’s Manual
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